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Technology Trends


To provide the wide selection of options for customers, NEC Electronics is working to establish a broad spectrum of new technologies, using deep sub micron lithography advanced new materials and other revolutionary advances.


90 nm 55 nm
(65 nm half-node)
Advantages
Device options* HP/ MP/ LP MP/ LP Best match for application requirements
Multiple-Vth** LVT/MVT/HVT LVT/MVT/HVT Optimal application performance
Triple oxide Yes Yes Lower power consumption and higher speed
Voltage (V) 1.0 (HP, MP)/1.2 (LP) 1.2 - 1.0 (variable) Optimal application performance
Gate dielectric Oxynitride High-k + oxynitride Lower power consumption (transistor)
Gate electrode CoSi/ Poly-Si NiSi/ Poly-Si Lower power consumption (transistor)
Low-k interlayer dielectric Full low-k rigid Hybrid low-k porous/ rigid Lower power consumption (interconnect) and higher speed
eDRAM Yes Yes Large-scale on-chip memory
Lithography ArF dry ArF immersion Deep sub micron feature size
Design for manufacturability Transitional Full-scale Higher yields, higher reliability

* Device options:
HP ≡ High performance
MP ≡ Medium performance
LP ≡ Low power

** Multiple-Vth (threshold voltage):
LVT ≡ Low Vth
MVT ≡ Medium Vth
HVT ≡ High Vth