Please note that JavaScript and style sheet are used in this website,
Due to unadaptability of the style sheet with the browser used in your computer, pages may not look as original.
Even in such a case, however, the contents can be used safely.
Body bias-sensitive configuration
The NEC Electronics UltimateLowPower technologies enable the use of reverse body biasing for reducing a chip's overall leakage power consumption. In body biasing, a voltage applied to the transistor body increases the transistor's threshold voltage (Figure 1) and thus reduces a major component of leakage current, subthreshold current (ISUBTH).
Channel Engineering for Body Bias Scheme
As part of the UltimateLowPower scheme, the CMOS transistor's channel structure has been re-engineered to create a super-steep retrograde well (Figure 2).
This channel structure creates a higher-concentration region between source and drain that is removed from the channel surface, where low concentration is desirable for performance reasons. The UltimateLowPower configuration therefore provides high sensitivity to reverse body bias while achieving excellent performance.
