SMAFTI®

LSIs used in mobile devices, such as terrestrial digital broadcasting receivers and digital video games with high-speed image processing, system-on-chip (SoC) technology is employed, in which a system is built on a single silicone chip. However, high development costs and limited memory capacity present problems for SoC technology.

Conventional SiP technology, in which memory and logic chips are mounted in a single package also has issues to overcome, such as the thickness of the so-called interposer (wiring board), the inability to efficiently raise signal transmission speed due to wire-bonding interconnections between chips and package and increasing size of package areas due to side-by-side chip placement.

NEC Electronics and NEC jointly solved these issues by developing SMAFTI, a proprietary SiP technology that enables a three-dimensional interconnection between logic and high-capacity memory chips, with an approximately 60 µm gap, 50 µm bump pitch, and 100 Gbps data transfer.

1. Proprietary attachment process with a 50 µm bump pitch and 100 Gbps data transmission
   The introduction of a silicon-to-silicon attachment process has enabled chip-to-chip connection with a 50 µm bump pitch, which is about 1/4th of the conventional pitch size. Consequently, the number of pins interconnecting logic and memory chips can be increased, enabling high-speed data transmission of 100 Gbps, which is over 10 times faster than conventional transmission rates.
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2. Proprietary ultra-thin feed-through interposer enabling SiP connection with high-capacity memory
   NEC Electronics' proprietary interposer (called a feed-through interposer, or FTI) of only 15 µm thickness is based on superconnect technology which uses 15 µm wide copper wiring and a 7 µm thick polyimide resin - half the size of conventional in-package wiring. This interposer enables a narrow 50 µm pitch interconnection between memory and logic chips and extends the wiring from the logic chip to an external pin.
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3. Proprietary leading-edge wafer assembly technology
   A memory chip is first mounted onto a silicon wafer which has been wired based on superconnect technology. Next, the chip and wiring layer are encapsulated by resin, the silicon wafer is removed, and a logic chip is mounted onto the back side. Solder balls were also formed on the back side to form a BGA (Ball Grid Array) which acts line external pins. The SMAFTI technology contributes to efficient production because the package can be made by only connecting the chips and the superconnect traces, without using a substrate as in conventional packaging.
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