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Products > ASIC > PFESiP >

Comparison Between the EP-1 Series and Other Solutions


A comparison between the PFESiP EP-1 Series and other CPU-mounted system LSI creation methods is shown below.
The PFESiP EP-1 Series has been developed to resolve the issues of these methods.


Comparison Between the EP-1 Series and Other Solutions

General-purpose microcontroller + gate array

General-purpose microcontroller + gate array

This solution requires the development cost for only the gate array and requires the least initial cost. It tends, however, to have a large mounting area and many mounting procedures, since two LSI chips are used.


SoC (Cell-Based IC)

SoC (Cell-Based IC)

This solution provides high design flexibility and the lowest product unit cost, but requires development time and cost.


PFESiP EP-1 Series

PFESiP EP-1 Series

This solution resolves the above-mentioned solution issues.


Detailed comparison


Item EP-1 Series General-purpose microcontroller
+ gate array 		SoC
(Cell-Based IC)
Development cost
Unit cost
Development TAT
Size/Area
Development friendliness *1
Design flexibility*1
Reliability of electric connection between user logic and CPU
Ease of updating
Test

: Best, : Good, : Pass, : Bad

Note(*)

  1. Using a platform that has already been verified is the optimal way to facilitate the development. The design flexibility, however, will be limited, since the circuit and configuration will be predetermined.