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Japan
Main Features of the 78K0R/KG3-C
| * | Maximum operating frequency of 20 MHz. can be operated on sub-system -clock at 32.768 kHz. |
| * | General-purpose registers: 8 bits x 32 registers (8 bits x 8 registers x 4 banks) |
| * | Flash memory: 128 Kbytes/96 Kbytes |
| * | RAM: 8 Kbytes/6 Kbytes |
| * | On-chip single power-supply Flash memory (with prohibition of chip erase/block erase/writing function) |
| * | Self-programming supported (with boot swap/Flash shield window function) |
| * | On-chip debugging |
| * | On-chip power-on clear (POC) and low voltage detector (LVI) |
| * | On-chip watchdog timer (can be operated with the on-chip internal low-speed oscillator clock) |
| * | On-chip multiplier/divider (16 bits x 16 bits; 32 bits / 32 bits) |
| * | On-chip key interrupt |
| * | On-chip clock output/buzzer output controller |
| * | On-chip binary coded decimal (BCD) adjustment |
| * | I/O ports: 89 (N-ch open drains: 4) |
| * | Timer: 14 channels |
| + 16-bit timer: 11 channels | |
| + Watchdog timer: 1 channel | |
| + Real-time counter: 1 channel | |
| * | Serial interfaces |
| + CSI: 2 channels/UART: 1 channel | |
| + CSI: 1 channel/UART: 1 channel/Simple I2C: 1 channel | |
| + CSI: 1 channel/UART: 1 channel/Simple I2C: 1 channel | |
| + I2C: 1 channel | |
| * | 10-bit resolution A/D converter (AVREF = 2.7 to 5.5 V): 16 channels |
| * | CEC transmitter/receiver |
| * | Remote-control receiver |
| * | Power voltage: VDD = 2.7 to 5.5 V |
| * | Ambient operating temperature: TA = -40 to +85 deg. C |
| * | Package: 100-pin plastic LQFP (fine pitch) (14 x 14) |
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