NEC Electronics Introduces On-chip ESD Protection for 45-nm High-speed Communications ICs

SCR-type ESD Protection Circuit Achieves Low Trigger Voltage with Low Leakage Current

NEC Electronics has developed new technology to protect the sensitive circuits in high-speed communications ICs from damaging electrostatic discharge (ESD) events. Applicable to devices fabricated at the next-generation 45-nm node, it utilizes a novel SCR (silicon controlled rectifier) *1 design to reduce leakage current and ensure adequate ESD protection without compromising performance.

NEC Electronics has long been aware of the importance of ESD protection. It has an active research program in this area, focusing on 1) on-chip ESD protection for the I/O pins of general-purpose circuits, 2) ESD protection for high-speed applications, and 3) internal ESD protection in complex power domains that consist of numerous functional blocks, such as low-power logic and analog circuits. The new technology relates to ESD protection for high-speed applications, such as communications ICs.

The newly developed ESD protection circuit consists of the SCR which has the company's original device structure to conduct a large current, and a trigger element to trigger the SCR. The key innovations were the use of P-channel MOSFET for the trigger element and an enhanced design for the connection between the trigger element and SCR.

NEC Electronics has previously developed SCR-type ESD protection circuits using N-channel MOSFET in the trigger element. These circuits have the advantages of small size and low parasitic capacitance. However, it was difficult to reduce leakage current *2 during normal operation while at the same time lowering the trigger voltage during ESD events.

The trigger element in the new technology is a P-channel MOSFET with four terminals (drain, gate, source, and backgate). It is designed so that the potential of the source terminal is lower than that of the gate and backgate terminals, which makes it possible to significantly reduce the current flowing into the trigger element. This innovation enables low-leakage current in a SCR-type ESD protection circuit. The trigger voltage during ESD events was also reduced by utilizing the channel current between the source and drain of the P-channel MOSFET to trigger the SCR.

Evaluation of a test-chip implementing the new ESD protection circuit demonstrated notable improvements over previous designs utilizing N-channel MOSFET as the trigger elements. The leakage current was reduced by approximately 4 decades to 1.0 nA (nanoamperes), while the trigger voltage of 1.8 V was about 60% lower.

Because of the shrinking geometries of SoCs at the 65-nm node and smaller, voltage and current tolerances at the circuit level have become ever more stringent. But smaller geometries require the same level of ESD protection as larger ones. As a consequence, it is becoming increasingly difficult to ensure adequate ESD performance. Especially in the case of SoCs for high-speed applications, leakage current and the parasitic capacitance of ESD protection circuits can have a significant impact on signal propagation over the interface circuits. The newly developed technology will help designers meet the challenge of ensuring adequate ESD protection without compromising performance.

NEC Electronics was early to recognize on-chip ESD protection as a vital technology for its advanced SoC products. Since 1999, it has pioneered a number of innovative technologies, such as the SCR-type ESD protection circuit for high-speed communications devices presented in 2002 at the international EOS/ESD (Electrical Overstress and Electrostatic Discharge) Symposium in the United States.

The new technology is ideally suited for use in high-speed interface circuits for standards such as PCI Express^TM *3 and Serial ATA. *4 It is also applicable for on-chip ESD protection at the 45-nm node and beyond. NEC Electronics is currently working toward introducing it in stable volume production processes.

NEC Electronics will present this new technology at the 29th Annual International EOS/ESD Symposium and Exhibits forum, to be held from September 16 through 21 in Anaheim, California.

*1 SCR (silicon controlled rectifier)
An SCR is a semiconductor device with four layers of alternating P- and N-type material. By passing gate current from the gate to the cathode, it allows a large current to be conducted between the anode and cathode.

*2 Leakage current
Unwanted current which leaks from electronic circuits to locations where it should not be present.

*3 PCI Express
Serial data interface standard designed to replace the PCI bus, proposed by Intel and specified by PCI-SIG (Peripheral Component Interconnect Special Interest Group).

*4 Serial ATA
Storage interface standard designed for data transfer between computers and storage devices such as hard disks. Serial ATA enables higher data transfer rates than the legacy parallel ATA standard.

PCI is a trademark of PCI-SIG. All other products names and service names mentioned in this release are trademarks or registered trademarks of their respective holders.

About NEC Electronics

NEC Electronics Corporation (TSE: 6723) specializes in semiconductor products encompassing advanced technology solutions for the high-end computing and broadband networking markets, system solutions for the mobile handset, PC peripherals, automotive and digital consumer markets, and platform solutions for a wide range of customer applications. NEC Electronics Corporation has 24 subsidiaries worldwide including NEC Electronics America, Inc. (www.am.necel.com) and NEC Electronics (Europe) GmbH (www.eu.necel.com). For additional information about NEC Electronics worldwide, visit www.necel.com.