As the integration density of Si LSI devices increases, the number of interconnects increases, resulting in higher parasitic capacitance and undesirable power consumption levels. One approach to decreasing parasitic capacitance is the introduction of low-k films such as organic silica films (SiOCH) with low polarizability, which have already been introduced in 90nm-node LSIs. Porous low-k films (obtained by introducing pores into low-k films) have been investigated for 65nm-node LSIs to further decrease capacitance. By further advancing low-k material technology, NEC, in collaboration with the MIRAI project, developed a molecular-pore-stack (MPS) low-k film, in which sub-nanometer pores were introduced uniformly. This film was then successfully applied to 45nm-node LSI interconnects.
However, there was still a challenge that needed to be addressed before 32nm-node interconnects could be realized. In general, porous low-k films are effective in decreasing parasitic capacitance, but their mechanical strength tends to decline as the porosity increases. Therefore, porous low-k films are usually used in combination with films possessing high mechanical strength. With conventional technology, these films are deposited with different processing tools, but changing tools while the film is grown inevitably exposes the wafer surface to the air, causing residual defects between each film, and giving rise to nonideality in the insulation property.
NEC and NEC Electronics' new technology achieves consecutive formation of different types of films in a single step, with a single tool, without breaking the vacuum. The density modulation technology for low-k films enables control of dielectric constants and mechanical strength of low-k films by changing the mixing ratio of two types of precursors using plasma co-polymerization technology. This single-step deposition prevents creation of defects at the interface between films, resulting in a decrease in leakage current by three orders of magnitude as compared with conventional interconnects. Moreover, the mechanical strength of the new film is twice as strong as that of conventional film, while maintaining an equal dielectric constant. Simultaneously, a novel, selective, dry-etching technique with enhanced precision was developed. This technique allows sensitive detection of the density modulation of low-k films.
By combining the above achievements, a highly reliable low-k interconnect structure was realized that does not incur current leakage, despite miniaturization of the patterning dimensions down to 50nm for 32nm-node LSIs. Moreover, interline capacitance of 83fF/mm was accomplished; a level in line with that previously achieved for 45nm-node interconnects, proving successful in suppressing power consumption. In 32nm-node ULSI interconnects, integration density is equivalent to that of placing a maximum of ten thousand lines within 1mm-width.
NEC believes that interconnect module technology using density-modulated low-k technology is essential to realizing 32nm-node ULSIs, and it will continue to advance its research activities toward their early realization.
This research result has been realized by advancing technologies developed in the first and second stages of the MIRAI project "Interconnect Module Technology with Low-k Materials" (note 4) and through joint research carried out by NEC and MIRAI. The organic silica precursors used in the research were supplied by Tosoh Corporation and Tosoh Finechem Corporation.
NEC and NEC Electronics will present the results of this research at the International Electron Devices Meeting (IEDM) 2006, being held from December 11 - 13 in San Francisco, USA.
Notes:
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In large-scale integrated interconnects, the presence of neighboring metal lines is equivalent to having capacitor devices placed unintentionally, causing an effect called parasitic capacitance. When the parasitic capacitance of an interconnect is large, the signal is delayed, therefore increasing power consumption due to excess charging and discharging of electricity during signal propagation. |
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A new-concept low-k film that is deposited in the vacuum by stacking silica-based precursor molecules, whose molecular structure is designed to contain a molecular pore. Low-k film with a dielectric constant of 2.4 was realized for 45nm-node LSIs through piling of a "molecular ring chain," consisting of 3 silicon atoms and 3 oxygen atoms that are activated in plasma. This is the result of an NEC and MIRAI joint research project. |
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A technology for depositing new films in a vacuum by introducing two types of precursors into plasma using co-polymerization reaction. This technology was basically demonstrated by the MIRAI project for organic dielectrics and was presented at the International Electron Devices Meeting (IEDM) 2003.* A new plasma-enhanced co-polymerization (PCP) technology for reinforcing mechanical properties of organic silica low-k/Cu interconnects on 300 mm wafers
Kawahara, J.; Nakano, A.; Kunimi, N.; Kinoshita, K.; Hayashi, Y.; Ishikawa, A.; Seino, Y.; Ogata, T.; Takahashi, H.; Sonoda, Y.; Yoshino, T.; Goto, T.; Takada, S.; Ichikawa, R.; Miyoshi, H.; Matsuo, H.; Adachi, S.; Kikkawa, T.;
International Electron Devices Meeting, 2003. IEDM '03 Technical Digest, IEEE International 8-10 Dec. 2003 Page(s):6.2.1 - 6.2.4
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The first stage of the MIRAI project "Interconnect Module Technology with Low-k Materials" was carried out from July 2001 to March 2004, and the second stage from April 2004 to March 2006. NEC participated in the project. MIRAI projects are supported by the New Energy and Industrial Technology Organization ("NEDO"). |
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