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Development of High-density Thin Semiconductor Package for Next-generation CSP/SiP
***** For Immediate Use May 28, 2003
NEC Corporation (NEC) and NEC Electronics Corporation (headquartered in Kawasaki, Kanagawa Prefecture; President: Kaoru Tosaka) announced today that NEC and NEC Electronics have succeeded in developing an ultra-thin, fine wiring substrate (MLTS: Multi-Layer Thin Substrate) based on an entirely new concept, as well as a semiconductor package (MLTS package) designed for it. This technology is targeted for the next generation of CSP/SiP (Note), which is expected to have application in a wide range of fields, including mobile devices.
The main features of this technology are follows:-
- Small, thin package
In the fabrication of the substrate, the fine wiring layer is first formed on a metal base and then the metal base is removed. This method makes it possible to achieve the same thinness as with tape base material and the same high density as with a built-up substrate. The result is a 0.3 mm pitch CSP, which has not been attainable with conventional tape base materials, and a thin MCP that has about 1/3 the substrate thickness of a built-up substrate.
- Low cost
Low cost is achieved by using existing built-up substrate fabrication lines to form wiring layers on both sides of the metal base at the same time and separating them after removal of the metal base, thus fabricating two substrates with a single process.
- High reliability
Epoxy resin enhanced with non-woven aramide for strength and flexibility is used as the insulation resin material to achieve the same substrate strength as conventional substrates in spite of the thinness, thus ensuring a practical-level package and mounting reliability.
In recent years, the performance of cell phones and other such mobile devices has been advancing. The achievement of smaller, thinner hardware systems in those devices is increasing the need for CSPs that have a pitch of less than 0.5 mm and hybrid high-density SiPs that include high-pin-count LSIs in addition to memory devices. In the past, polyimide tape base materials that are about 100µm thick have been used as the thin substrate materials for CSPs and SiPs. Those materials, however, have low mechanical strength and are limited in terms of pitch and device density. Furthermore, although high-density wiring is achievable with built-up substrates, it is necessary to form fine wiring layers on both sides of the printed circuit board that serves as the core to retain substrate strength, so even the thinnest of current substrates is about 300µm thick. There remains a need for a semiconductor package that achieves both high device density and thinness at the same time.
The MLTS package that we have developed answers that need by making it possible to realize a 0.3 mm pitch CSP and an MCP that is less than 1 mm thick, yet can stack multiple chips in multiple layers.
NEC and NEC Electronics have already test fabricated a 0.5mm-pitch, 384-pin CSP and a 0.4-mm-pitch, 288-pin CSP. These devices are currently being tested for mass production line assembly, package practicality and mounting reliability. Development of the MLTS package into commercial product by mid-2003 is planned.
NEC and NEC Electronics aim to position the MLTS package as the de facto standard in the high-density package market.
Please find attached for appearance of the 0.4mm-pitch MLTS-CSP and its specification.
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(Note)
The CSP (Chip Size Package) is miniaturized to reduce the mounted footprint to about the size of the chip. The SiP (System in Package) enables the mounting of multiple chips in two or three dimensions.
Information in the press releases, including product prices and
specifications is current on the date of the press announcement,
but is subject to change without prior notice.
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