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QDR™II SRAM 18M bit
(Operating ambient temperature: Commercial TA=0 to +70°C),
(Operating ambient temperature: Industrial TA= -40 to +85°C)
18M bits (2M words x 8 bits organization)
|
Part Number*1
|
Speed Grade
|
Clock Frequency (MHz)
|
Supply Voltage (V)
|
Package
|
Remark
|
Data Sheet
|
0 to +70°C
|
-40 to +85°C
|
Chip
|
I/O*2
|
|
µPD44165082
|
E50
|
--
|
200
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ1: 165-pin BGA (13x15mm)
|
Burst Length of 2
|
(309KB)
|
|
E60
|
--
|
167
|
|
E75
|
--
|
133
|
|
µPD44165082A
|
E40
|
E40Y
|
250
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ2: 165-pin BGA (13x15mm)
|
Burst Length of 2
|
(378KB)
|
|
E50
|
E50Y
|
200
|
|
µPD44165084
|
E40
|
--
|
250
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ1: 165-pin BGA (13x15mm)
|
Burst Length of 4
|
(311KB)
|
|
E50
|
--
|
200
|
|
E60
|
--
|
167
|
|
µPD44165084A
|
E33
|
--
|
300
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ2: 165-pin BGA (13x15mm)
|
Burst Length of 4
|
(389KB)
|
|
--
|
E37Y
|
270
|
|
E40
|
E40Y
|
250
|
|
E50
|
E50Y
|
200
|
|
Note(*)
- µPD44165xx2A and µPD44165xx4A are upward compatible with µPD44165xx2 and µPD44165xx4, respectively. µPD44165xx2A and µPD44165xx4A are recommended for new designs. These products are planned to be consolidated to µPD44165xx2A and µPD44165xx4A.
- During normal operation, the supply voltage of I/O must not exceed that of Chip.
18M bits (2M words x 9 bits organization)
|
Part Number
|
Speed Grade
|
Clock Frequency (MHz)
|
Supply Voltage (V)
|
Package
|
Remark
|
Data Sheet
|
0 to +70°C
|
-40 to +85°C
|
Chip
|
I/O*1
|
|
µPD44165092A
|
E40
|
E40Y
|
250
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ2: 165-pin BGA (13x15mm)
|
Burst Length of 2
|
(378KB)
|
|
E50
|
E50Y
|
200
|
|
µPD44165094A
|
E33
|
--
|
300
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ2: 165-pin BGA (13x15mm)
|
Burst Length of 4
|
(389KB)
|
|
--
|
E37Y
|
270
|
|
E40
|
E40Y
|
250
|
|
E50
|
E50Y
|
200
|
|
Note(*)
- During normal operation, the supply voltage of I/O must not exceed that of Chip.
18M bits (1M words x 18 bits organization)
|
Part Number*1
|
Speed Grade
|
Clock Frequency (MHz)
|
Supply Voltage (V)
|
Package
|
Remark
|
Data Sheet
|
0 to +70°C
|
-40 to +85°C
|
Chip
|
I/O*2
|
|
µPD44165182
|
E50
|
--
|
200
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ1: 165-pin BGA (13x15mm)
|
Burst Length of 2
|
(309KB)
|
|
E60
|
--
|
167
|
|
E75
|
--
|
133
|
|
µPD44165182A
|
E40
|
E40Y
|
250
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ2: 165-pin BGA (13x15mm)
|
Burst Length of 2
|
(378KB)
|
|
E50
|
E50Y
|
200
|
|
µPD44165184
|
E40
|
--
|
250
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ1: 165-pin BGA (13x15mm)
|
Burst Length of 4
|
(311KB)
|
|
E50
|
--
|
200
|
|
E60
|
--
|
167
|
|
µPD44165184A
|
E33
|
--
|
300
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ2: 165-pin BGA (13x15mm)
|
Burst Length of 4
|
(389KB)
|
|
--
|
E37Y
|
270
|
|
E40
|
E40Y
|
250
|
|
E50
|
E50Y
|
200
|
|
Note(*)
- µPD44165xx2A and µPD44165xx4A are upward compatible with µPD44165xx2 and µPD44165xx4, respectively. µPD44165xx2A and µPD44165xx4A are recommended for new designs. These products are planned to be consolidated to µPD44165xx2A and µPD44165xx4A.
- During normal operation, the supply voltage of I/O must not exceed that of Chip.
18M bits (512K words x 36 bits organization)
|
Part Number*1
|
Speed Grade
|
Clock Frequency (MHz)
|
Supply Voltage (V)
|
Package
|
Remark
|
Data Sheet
|
0 to +70°C
|
-40 to +85°C
|
Chip
|
I/O*2
|
|
µPD44165362
|
E50
|
--
|
200
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ1: 165-pin BGA (13x15mm)
|
Burst Length of 2
|
(309KB)
|
|
E60
|
--
|
167
|
|
E75
|
--
|
133
|
|
µPD44165362A
|
E40
|
--
|
250
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ2: 165-pin BGA (13x15mm)
|
Burst Length of 2
|
(378KB)
|
|
E50
|
--
|
200
|
|
µPD44165364
|
E50
|
--
|
200
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ1: 165-pin BGA (13x15mm)
|
Burst Length of 4
|
(311KB)
|
|
E60
|
--
|
167
|
|
µPD44165364A
|
E33
|
--
|
300
|
1.8±0.1
|
1.4 to 1.9
|
F5-EQ2: 165-pin BGA (13x15mm)
|
Burst Length of 4
|
(389KB)
|
|
E40
|
--
|
250
|
|
E50
|
--
|
200
|
|
Note(*)
- µPD44165xx2A and µPD44165xx4A are upward compatible with µPD44165xx2 and µPD44165xx4, respectively. µPD44165xx2A and µPD44165xx4A are recommended for new designs. These products are planned to be consolidated to µPD44165xx2A and µPD44165xx4A.
- During normal operation, the supply voltage of I/O must not exceed that of Chip.
QDR RAMs and Quad Data Rate RAMs comprise a new series of products developed by Cypress Semiconductor, Renesas, IDT, NEC Electronics and Samsung.