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Volume 91 (Aug 28, 2009)

Summary of NEC Electronics Papers Presented at the 2009 Symposia VLSI Technology and Circuits (3/4)


A new measurement method and analytical modeling: Single-charge-based Modeling of Transistor Characteristics Fluctuations Based on Statistical Measurement of RTN (*1) Amplitude

A method for quantitatively modeling "random telegraph noise" (RTN)—a predicted time fluctuation phenomenon that accompanies the scaling down of transistors and degrades the reliability of future system LSI chips—was developed.



Phenomenon of fluctuation of RTN

As system LSI chips are scaled down, the random fluctuation of transistor characteristics becomes a major problem. As a result, in regard to the development of system LSI chips, degradation of the reliability of LSI chips can be avoided by performing circuit design in consideration of this fluctuation. With further LSI scaling down from now onwards, "random telegraph noise" (RTM)—a new fluctuation phenomenon by which transistor characteristics discontinuously fluctuate with time as a result of single electric charges entering and leaving traps (*2)—is predicted to become a serious problem (Figure 1). Compared to conventional fluctuation, RTN is significantly different from the viewpoint that transistor characteristics vary with time. Accordingly, as a countermeasure against RTN, a new method is needed. In the present study, by quantitatively calculating the effect of RTN on circuit performance, a new measurement method and analytical modeling which enable highly reliable circuit design were developed.


The range of fluctuation of transistor characteristics due to RTN is not constant; it varies by statistical chance. That is, while RTN is causable by one or more individual transistors, the number of traps in a transistor and their location are determined by chance. Moreover, how much characteristic fluctuation (i.e., amplitude of fluctuation) each trap can cause is also uncertain. Consequently, to model RTN, it is necessary to grasp what kind of probabilistic distribution is formed by the number of traps and the characteristic-fluctuation range produced by each trap through measurement of a huge number of transistors. Given that requirement, by using a test circuit housing about 1000 transistors and achieving quasi-parallel measurement, NEC Electronics developed a method for effectively measuring the statistical distribution of the fluctuation characteristics and the amount of RTN.


Model for RTN analysis

Furthermore, to perform highly reliable circuit design—based on the data obtained by the developed method—for avoiding abnormal operation due to RTN, it is necessary to know the maximum fluctuation range of transistor characteristics (i.e., the worst characteristic-fluctuation amplitude). Given that requirement, utilizing an analytical calculation based on statistical theory, we derived an analytical model that can simply calculate the maximum (i.e., worst) characteristic-fluctuation amplitude from the aforementioned measurement results (Figure 2).


Combining the measurement method and analytical model makes it possible to calculate maximum fluctuation amplitude of transistor characteristics and then to execute LSI circuit design based on the calculation results. In this manner, highly reliable system LSI chips that avert abnormal operation due to RTN can be created. At NEC Electronics, we will continue our research on RTN while aiming to create high-performance and high-quality LSI chips.

Notes (*)


  1. RTN
    A fluctuation phenomenon whereby conductivity of a transistor temporarily fluctuates in accordance with switching of two trap states—namely, accumulated charge in a trap or no charge (empty) in the trap. The range (amplitude) of the fluctuation of transistor characteristics due to switching between the two trap states varies according to the location of the traps. Moreover, if two or more traps exist, the amplitudes of characteristic fluctuation attributed to each trap are summed up, and the overall amplitude thereby increases.
  2. Trap
    A minute defect—existing in the insulation layer of a transistor's gate—to which a single electrical charge can come and go. It is considered that traps cannot be completely eliminated from the nature of materials.


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