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What to do with the many millions of transistors that fit into today's chips? If you design those chips, you probably want to use huge numbers of transistors to make memory, because every system-on-a-chip (SoC) needs lots of it. Using external DRAM-like the memory chips in PCs-slows an SoC down and uses more power. Putting the memory inside the SoC also shrinks everything by reducing the overall number of components and the number of pins on the SoC.
The catch is, you need more than transistors to make DRAM. You need capacitors to store electric charges representing 1s or 0s. Consisting of two conductors separated by an insulator, capacitors are just about the simplest electronic component. But making them in a chip requires highly specialized process steps.
To make commodity DRAM chips, for instance, manufacturers typically use a process that etches deep trenches in the chip's silicon and coats them with a conductor to create the capacitors. These trenches are the Grand Canyons of silicon-dozens of times deeper than anything in an SoC that is made using a standard CMOS process (Figure 1).
In fact, this deep-trench process is so alien to standard CMOS technology that most manufacturers use two fabrication (fab) lines to make a single SoC with embedded DRAM. First these manufacturers make the deep-trench capacitors on a fab line built for memory. The silicon wafers are then carried to a CMOS fab line to complete the SoC. Given the sensitivity of the devices involved, it is a tribute to process engineers that they have been able to get this two-fab-line method to work. Unfortunately, the method's complexity drives the cost so high that few people can justify the expense of this type of embedded DRAM. (Similar problems affect conventional stacked capacitors, the main alternative to deep-trench capacitors.)
The obvious solution is to use the standard CMOS process steps to make capacitors. After all, how hard could it be to sandwich an insulator between two conductors? If you could add any number of steps and new materials, you could easily make CMOS capacitors. To keep costs reasonable, though, the extra steps and materials must be kept to a minimum.
You also have to build capacitors that are extremely tiny, hold a lot of electric charge, and keep that charge from leaking away too fast. Further, the process has to use much lower temperatures than the deep-trench method to avoid damaging the chip's transistors. And if you stack the DRAM structures too high off the surface of the chip, that causes problems.
Years ago, NEC Electronics saw that embedded DRAM would be enormously valuable for SoCs and began looking for ways to meet all the requirements of high-performance embedded DRAM for CMOS chips. The company invested heavily in developing new stacked-capacitor methods and materials, and these investments have paid off in a series of embedded DRAM technologies that are fully compatible with standard CMOS. While hardly a handful of other companies have managed this achievement, NEC Electronics has done it with amazing performance results.
The latest generation of NEC Electronics embedded DRAM (using the 90-nm UX6D process) offers random access times shorter than those of competing products by a factor of 10. That means the NEC Electronics DRAM can provide data to an SoC's processor far faster than other embedded DRAM.
If the SoC is in a game system, the system gains the ability to run Mario and Metroid with stunning realism at a breakneck pace. An SoC made by a previous generation of the NEC Electronics process is indeed at the heart of every Nintendo GameCube? system. This complex graphics chip contains six million logic gates and 24 megabits of embedded DRAM. NEC Electronics has fabricated millions of these chips.
The new UX6D generation allows designers to pack even more DRAM and processing power into a single chip. If half of a typical-size UX6D SoC consists of embedded DRAM, for example, the DRAM capacity is about 256 megabits.
In addition to video games, embedded DRAM is useful for a wide variety of communications equipment, digital home electronics and enterprise servers. These applications take advantage of embedded DRAM's ability to boost system speed.
Another reason to use embedded DRAM is to reduce power consumption. This power savings is possible because the core logic in today's SoCs runs at such a low voltage-just 1 volt, in the case of the UX6D chips. On the other hand, driving signals off of the SoC to external memory chips requires higher voltages to make sure electrical noise does not cause problems. While these external signal voltages have remained more or less constant over the years, the core voltage of SoCs has steadily decreased. The latest embedded DRAM can thus save more power than ever before.
For this reason, NEC Electronics offers two different types of embedded DRAM for the UX6D process. One type is optimized for speed, just like the previous generations of embedded DRAM.
The other type is optimized for low power and high density. This embedded DRAM is what enables the 256-megabit capacities mentioned earlier. The low power of this type also enables NEC Electronics' embedded DRAM to expand into new applications such as cellular phones and other mobile/handheld devices. Such portable devices do not generally need higher operating speeds, so designers of these products have not taken advantage of embedded DRAM. The UX6D process' high-density/low-power option promises to change all that, since minimizing power consumption is crucial to a cell phone's success.