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Volume 19 (Apr 14, 2004)
The challengers who developed the PDP Driver IC (2/2)
Part 1: The long and winding road from SOI development to TCP realization
The days of early morning regular meetings and all-night shifts
It was in 1998 that the SOI process development environment was completed and product development began. In that year, Kenya Kobayashi, who was in charge of device technology at the time, made a presentation at the International Symposium on Power Semiconductor Devices & ICs (ISPSD) about the development status of the high-voltage SOI process made possible by a structure in which two wafers are bonded together. It was with this presentation that the development team's efforts began to receive recognition from peers in the industry.
The high-voltage SOI process was a first even for NEC. While high-voltage SOI processes were being created using a 1 to 2µm rule at other companies, Kobayashi was contemplating the adoption of the 0.5µm rule. If this could be accomplished, chip size could be reduced and a profit could be achieved even if expensive SOI wafers were used. On the other hand, the 1.5µm rule PDP driver IC developed in 1996 had gradually begun to lose its cost competitiveness. To regain it, the team decided that its next product would be developed with the SOI process and a driver module consisting of new slim chips that had high-voltage outputs lined in a single row and mounted on a Chip on Flexible Film (COF) with an aluminum board (Photo 6). Thanks to the new process and the COF-specific layout, the new IC chips became less than half the size of conventional ones. The utilization of COF, now the mainstream mounting method for data driver ICs, was challenged for the very first time in the industry in 1999. The development team members soon learned that this challenge would be even more difficult than they had ever imagined and found themselves faced with the harsh reality of what they were really up against.
Problems seemed to be arising almost on a daily basis. To solve them, the team would get together every morning at 8:30 for regular meetings in which members shared information and explored possible countermeasures. Every day, they listed the problems on a whiteboard and divided them amongst themselves to dealt with and resolved. Even after several months, the list of problems had not grown any shorter. Amidst this troubling situation, Kousuke Yoshida was transferred from the LCD Process Development Group and put in charge of device technology. In their quest to come up with solutions, the team decided to work in individual all-night shifts. With regular morning meetings and all-night shifts, each member was reaching the limit of patience.
Each one says the same thing: "It was really hard. But we had no choice but to go about it by solving one problem at a time."
Making the transition to TCP using a BOX piercing contact structure
In 2000, the trial and error process and team's perseverance were finally beginning to pay off. Problems were being solved one by one and the team was finally able to take a breather. It soon became clear, however, that circumstances around them were moving at a speed much higher than the pace at which they were proceeding. To meet the demand of makers to further reduce costs, it became necessary to quickly proceed with the transition to Tape Carrier Package (TCP) technology for the COF packaging technology that had been developed as a result of many hardships.
However, there was a problem. Since TCP packages do not have an aluminum board for radiation, the back of the package remains open. This means that there is a possibility that breakdown voltage could drop in ICs employing SOI process because the back side voltage of the IC chip cannot be fixed to ground (ground potential, 0V). And because this was the first time for this group to be involved in the development of a high-voltage SOI process, the team members were unable to get a clear answer no matter who they asked.
S: Source, G: Gate, D: Drain,
P: P-type semiconductor, N: N-type semiconductor,
HV-NMOS: High-voltage N-ch MOS,
HV-PMOS: High-voltage P-ch MOS,
P-substrate: P-type substrate
Kobayashi, in his determination to solve this problem on his own, made his utmost effort to devise a solution. By making holes in the oxidation film and allowing conduction through the top and bottom of the substrate, he would be able to fix the voltage to ground. However, the BOX piercing contact structure (Figure 3), which was later to become an epoch-making theory, was merely a theory on paper at the time. It was difficult trying to create a structure the team could be completely satisfied with. Although members were able to form a trench with a width 10 times that of normal trenches, configuration abnormalities occurred. Despite the fact that this problem was eventually solved by changing the conditions of the etching gas used to form the trenches (the ratio of discharge flow of several types of gases and modification of the gas pressure), the team continued to encounter problem after problem.
During formation of the BOX piercing contact structure, there is a big difference in level in the trench section, etching cannot be carried out, and holes cannot be made. Moreover, the flow of resist, which is the patterning material employed during the wiring formation process that takes place within the large-area trench, causes the aluminum in the shoulder (edge) of the trench to become exposed. In other words, if the size of the large-area trench is small, it will interfere with the formation of the BOX piercing contact structure; if it is large, then the aluminum will become exposed. Thus, the team had to find a way to solve this contradiction.
Day after day in the hot summer sun, Masayuki Ito of the Display Systems Division went back and forth between the test production line and his office to create prototypes and, during this time, he was unable to hide his disappointment. Takahashi even came to the point where he thought is the goal might be impossible. After all, many had predicted they would never be able to realize TCP with SOI process technology.
Despite this, Kobayashi and Ito continued. They started to feel confident. Finally, once they had calculated the appropriate size of the large-area trench and the BOX piercing contact structure that would satisfy all of the conditions, the problem they had faced for so long was solved. Furthermore, upon confirming that modifying the thickness of the resist would make it possible to simultaneously form the conventional contact structure (the circuit wiring connection structure formed on the surface of the substrate) and the BOX piercing contact structure, they were able to devise a way to develop a high-voltage SOI process with the same number of operation steps as a conventional high-voltage SOI process. In the fall and winter of that year, Kobayashi and Ito established the new process technology. Their paper was subsequently presented at the Institute of Electronics, Information and Communication Engineers Conference (Figure 3). Once the PDP driver IC proved to be a great business success in 2001, Kobayashi's name became widely known throughout the industry. Thus, having solved the difficult task of making the transition to TCP technology, the daily early morning meetings finally came to an end.
