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Volume 19 (Apr 14, 2004)

The challengers who developed the PDP Driver IC (1/2)

Part 1: The long and winding road from SOI development to TCP realization

Winning the ADY 2003 Grand Prize - the result of their struggles

It was July 2, 2003. Keijuu Takahashi, project manager of the Display Systems Division, and other members of the PDP driver IC development team were at the Advanced Display of the Year (ADY) 2003 awards venue. The ADY awards were established in 1996 to support the advancement of technology in the display and peripheral device industries as well as to encourage market expansion. With the market growth of PDPs and LCDs, the awards have been gaining more and more recognition throughout the industry with each passing year.

On this day, NEC Electronics' 192-output PDP data driver IC, µPD16347, received the Grand Prize in the "Display Materials and Components" category. The team members were jubilant. In the display industry, where attention is primarily focused on display modules and image engines, it can be said that this was a brilliant achievement for a driver IC. At the time, however, Takahashi did not have any special feelings or emotions about this. Several days later, however, as he looked at the commemorative trophy, he was suddenly reminded of the team's early morning regular meetings. The eight years of daily struggles began to replay in his mind and a sense of achievement and gratification slowly began to well up inside of him. He then thought, "This was only possible because we never gave up."

Proceed with SOI development or bring it to a halt - that was the question

It was at the end of 1995 that full-scale research and development on color PDPs started and expectations began to rise for the realization of ultra-thin televisions. In that year, Takahashi took over PDP driver IC development in the Design Department of the Semiconductor Division. With Hideto Nitta in charge of packaging technology and Tomoaki Hayashi in charge of applied technology, Takahashi visited major PDP makers to ask them about their needs. During these visits, the group found that the three things most requested were packaging density improvements, heat generation countermeasures and cost reductions.

The following year, NEC adopted the newly developed 1.5µm CMOS process and developed a Chip-on-Board (COB) driver module with an aluminum board attached to the back of the printed circuit board to boost the radiation effect (Photo 4). Compared with the quad flat package (QFP), this driver module made high packaging density and radiation ability a reality. Subsequently, mass production of the module began. Although this product was critically acclaimed early on, the driver IC business faced a new problem just as PDPs were beginning to gain popularity in industrial-type applications.

Cost reductions and high-quality images were the most critical issues facing PDP makers as they were beginning to make progress in developing "electric energy recovery drive" technology as a more efficient drive method. Although the self-isolation structure used for driver ICs did not pose a problem with the conventional drive method, it was discovered that large power loss would occur due to leakage current from parasitic transistors with the use of an electric energy recovery drive circuit. As a result, it became clear that efficiency would deteriorate. To prevent this power loss, however, a large-scale output transistor would be necessary, in turn, causing the chip size to become larger.

To eliminate the power loss caused by parasitic transistors, it would be essential to adopt a process technology referred to as Silicon-on-Insulator (SOI). By combining SOI with the trench that exists on the surface of silicon substrates, a dielectric-isolation structure that electrically separates the elements would make it possible to obtain a high electric energy recovery rate since in theory it does not cause leakage current (Figure 1).

At the time, since other companies were in the lead in terms of the development of a high-voltage SOI process there was concern about whether we could survive in the market if we don't create SOI products. There was a major obstacle that had to be overcome. Since all of the SOI wafers purchased from wafer makers were expensive, the profit outlook was not very good. Team members found themselves faced with a difficult decision-adopt the use of the SOI process or not?

At long last - the commencement of SOI process development

In early 1997, the common view among those involved in its development was that SOI was absolutely imperative. In January, Takahashi submitted a process development request form to the Device Technology Department. This was considered a strong demand from Hayashi, the leader of the Applied Technology Department.

The electric energy recovery efficiency of the SOI process is superior to that of self-isolation structures. Moreover, there are a number of advantages to SOI, including the fact that it is latch-up free (in principle, the problematic phenomenon referred to as "latch up" that is characterized by noise, etc. and occurs in ICs employing the CMOS process does not occur). However, since the type of wafer necessary for high-voltage SOI is a structure in which two wafers are bonded together, the cost of raw materials becomes two to three times that of a normal wafer (Figure 2) not a price that would lead to profits.

Another problem was that while actual results had been achieved by other companies with SOI technology capable of breakdown voltage over 100V, it was said that the commercialization of SOI technology capable of breakdown voltage less than 100V, the target of the NEC team, would be difficult. Team members persevered was and finally decided that it would be better to focus on the technology's excellent characteristics rather than profitability. If this decision had not been made, the current PDP driver IC business most likely would not be in existence today.

SOI process development began in May. At that time, no one could have predicted the unimaginable difficulties that were awaiting.

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