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Volume 2 (Aug 01, 2003)

Facing the Challenge of CB-90 Development (2/2)

Part 1: Process Development


Troubles after troubles...surviving the failures

During the development, the team members had been struck with frequent trouble and a fair number of failures. This was quite understandable, as they were trying to roll out the world's first full-fledged 90 nm process integration. In fact, it would have been incredible if there had been no trouble or failures at all.

Here, one such example is described: the development of the new formation method of gate dielectric film, of which Atsuki Ono himself was directly in charge.

Different function blocks of an LSI operate on different voltages. Different operating voltages require transistors with different gate-dielectric film thickness. This means that it is necessary to form different thickness of gate-dielectric film on an LSI. Generally, a thick film is formed first and then followed by thin-film formation. The conventional method for dielectric film formation involves oxidation of the silicon surface after cleaning. At the cleaning process, native-oxide film is formed, whose quality is not as good as the film formed in the following stage. When one is trying to form a very thin oxidized film of good quality, the native-oxide film stands as a major obstacle. This native oxide film of low quality deteriorates the entire film's reliability. Therefore, it was essential that this film be removed before the oxidation stage. However, if hydrofluoric acid treatment is performed to remove the native-oxide film, the thick film part is partially removed at the same time. The team had to develop a native- oxide film removal method that would not affect the thick film part.

The method invented by Ono was the RTH method (Figure 4) that takes advantage of hydrogen's reducing effect. When a native-oxide film is exposed to hydrogen (H2) inside a decompressed chamber, a chemical reaction breaks the native oxide down into silane (SiH4) and water (H2O). Ono's idea was a brilliant one; not only would it remove the native-oxide film completely, but it would also realize extremely high-quality Si-SiO2 interface and improve transistor performance (Figure 5). At IEDM2001, this proposed method was comprehensively evaluated and deemed to have a fatal flaw. If the reducing reaction is allowed to go on even after natural-oxide film is removed, because of the high temperature sustained, silicon atoms exposed on the surface start migrating. As a result, the "facet" generated at the edge of the isolation region degrades thin-gate dielectric reliability and changes characteristics in small-size transistors. The team found no way to suppress this phenomenon despite a lot of effort, and eventually had to abandon this method. After that, they returned to the conventional method, and solved this problem by optimizing a cleaning condition.


Concept of Rapid Thermal Hydrogen-annealing (RHT) process

This is the method for removal of native-oxide film through utilization of hydrogen reduction reaction. It is assumed that native oxide (SiOx) decomposes into SiH4 and H2O as a result of hydrogen reduction reaction.
AFM images of silicon surface

The images shown here are of a silicon surface after removal of native-oxide film. The image on the left depicts the surface after use of the new pre-cleaning (RTH) method.


The electric discharge resulting from use of pure water for cleaning procedures was also a problem. In the case of pure water, because it contains very few impurities, fluidity resistance is high and generates static electricity due to friction. Then, like an insulator, the static electricity begins to accumulate. When the accumulated electricity exceeds a certain level, electrical discharge begins. This in turn damages the thin dielectric film, the most important component of the transistor.

The team also faced many other unexpected issues that cannot be described here, as they require numerous pages. Just to cite one example, the major issue for wiring was the dissolution and corrosion of copper.

Yet despite all the difficulties, the team eventually managed to overcome all of them through steady efforts. Undoubtedly the very fact that they were working toward the world's first 90 nm integration process for system LSI design provided the motivation they needed to break down the walls.


New gate-dielectric film formation process...Original technology born from perseverance

The formation of gate-dielectric film is one of the most critical steps in 90 nm process technology. In this generation, leakage current of the gate dielectric directly affects LSI power. Reducing the thickness of the dielectric film increases transistor drivability and switching performance, but at the same time degrades the insulation ability between the gate electrode and the substrate/source/drain, resulting in an increase of power consumption. For this reason, it was necessary to develop a new method that would enable the formation of a thinner gate dielectric without degrading insulation ability.


Concept of the radical nitridation process

With keeping its physical thickness of the dielectric, the electrical thickness can be decreased by modifying at the top surface of the dielectric film by nitridation.

To cope with this problem, the development team implemented a new process step called "radical nitridation", which was at the time being developed at the NEC Silicon System Research Center (Figure 6).

Although the isolation ability of nitrided silicon was known to be high, it was also commonly believed that it was incompatible with LSI's gate-dielectric formation process that requires high reliability. In spite of this, the team began to search for a way to adopt the technology to an integration process in the world's first attempt. The team thought it out and reached an idea: nitriding only the surface vicinity of the gate dielectric film. While this idea seemed fairly simple, actual implementation turned out to be far more challenging than expected.


Ig-Vg characteristics of our gate dielectric

Through utilization of the radical nitridation process, we were able to achieve a more than single-digit decrease in gate leakage current and a gate leakage current of 0.3 nA/µm per transistor.

In conventional oxidization, temperature and time are the only parameters of the gate-dielectric formation. However, in the case of "radical nitridation", several other parameters, such as plasma wattage, had to be added. The only way to determine the optimum parameters was to change parameter combinations one by one and evaluate the processed gate dielectric repeatedly. The two engineers in charge of unit-process technology literally clung to the equipment and continued their optimization efforts.

Moreover, to ensure that the evaluated method was feasible, it was essential to confirm that the new method could be implemented in the existing production line without disturbing other products. This was highly important. If, for example, the line had to be stopped because of new gate-dielectric processing and verification, unimaginable costs would be incurred.

The team, and people who supported them, continued such investigative work with utmost care, trying not to miss any issues. Behind the successful story of the new gate-dielectric development lies tremendous effort by all the people involved.

In part two of this series, we will move on to disclose the challenges the design team faced in CB-90 development.




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