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Products > ASIC > Gata Array and Embedded Array > Product Overview >

Gate Array Selection Method


"There are so many different types of gate arrays...which kind should I possibly choose?"

NEC Electronics' gate arrays and embedded array are categorized based on the power supply voltage of the peripheral circuit being connected to.
By deciding on a power supply voltage and package based on the set being developed, you can check for a master which meets your needs using the Die Estimator.


"There are so many different types of gate arrays...which kind should I possibly choose?"

Decide on a power supply voltage

Verify the peripheral circuit power supply voltage to be connected to the gate array or embedded array.
Cases where peripheral circuits operate on a single power supply or where there are multiple power supply voltages are both supported.


Peripheral circuit operating on a single power supply

Peripheral circuit with multiple power supplies

Decide on a package

Select a package fitting the development set. NEC Electronics offers a wide range of gate arrays and embedded arrays, from 4.38 × 4.38 mm ultra-compact to high-performance ABGA packages.


Decide on a package

Note(*)

  1. FPBGA Package Lineup (planned)
    Achieving a thickness of 0.7 mm (not including the ball section) with 48 to 144 pins, these are ultra-compact packages contributing to the realization of set miniaturization and thinning.
Package/Size CMOS-N5 CMOS-9HD CMOS-10HD EA-9HD
48-pin FPBGA 4.38×4.38 mm µPD65880 - -
61-pin FPBGA 5×5 mm - - µPD65*41
µPD65*21 		-
65-pin FPBGA 6×6 mm µPD65881
µPD65892
µPD65882
µPD65894 		µPD65943
µPD65944 		- µPD65443
µPD65444
97-pin FPBGA 6×6 mm µPD65892
µPD65882
µPD65894 		µPD65944
µPD65945 		µPD65*21
µPD65*22
µPD65*61 		µPD65444
µPD65445
144-pin FPBGA 7×7 mm - µPD65946 µPD65*04
µPD65*23 		µPD65446


Searching with the Die Estimator

After finishing series (based on power supply voltage) and package selection, enter other details into the "Die Estimator" to search.
The "Die Estimator" is provided on the NEC Electronics' Gate Array and Embedded Array homepage (http://www.necel.com/gatearray/en/). It can be operated from a web browser for ease of use.
Here is a master search example using the following conditions.


• Power supply voltage : 3.3 V • Memory : (256 words x 16 bits) × 4
• Operating frequency : 33 MHz (asynchronous 2-port type)
• User logic : 10,000 gates • Other : On-chip scan circuit


  • Please click image for large view.

img#1

Access the NEC Electronics Gate Array and Embedded Array page (http://www.necel.com/gatearray/en/) from a web browser and click on the "Die Estimator" link.
img#2

The Die Estimator page will be displayed.
Click on the tool screen.

img#3

Since the power supply voltage is 3.3 V, (1) choose "CMOS-9HD" from "Family" and (2) enter "33" (MHz) for "Max. Operating Frequency". After finishing, (3) click the "NEXT" button.
img#4

(1) Enter "10000" for the number of logic gates in "User Logic", and (2) check "NEC SCAN".

img#5

(1) Select the memory type (asynchronous 2-port type) from "Macro Type" and select the memory size (256 words x 16 bits) from "Macro Name".
(2) Next, enter the number of macros ("4") in "No. of Macro", and (3) click the "ADD" button. Confirm that the correct macro has been registered in "Selected Macro" then (4) click the "NEXT" button.
img#6

The estimate result shows "µPD65948" to be the optimal master.