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Performance Comparison by Series Chart

NEC Electronics' gate arrays are provided in many variations, to suit various required circuit scales, power supply voltages, and operating frequencies.

Basic Performance

Parameter CMOS-N5 CMOS-9HD EA-9HD CMOS-10HD CMOS-12M Process 0.5 µm 0.35 µm 0.35 µm 0.25 µm 0.15 µm Wiring layers 2 layers 3/4 layers 3/4 layers 3/4 layers 5/6 layers Power supply voltage 4.5 to 5.5V 2.7 to 3.6V (2.7 to 5.5V) 2.7 to 3.6V (5 V tolerant) 2.7 to 3.6V 3.3V/5.5V (5 V full swing output enabled) 2.3 to 2.7V 1.65 to 1.95V 2.5V/3.3V 1.8V/3.3V 1.5V (internal) 1.8V/2.5V/3.3V (4 power supplies max.) Operating frequency 5V: 60MHz 3.3V: 33MHz 100MHz 100MHz 2.5V: 133MHz 1.8V: 66MHz 200MHz (local: 300MHz) Density 1.5K to 93K 11K to 1.51M 10K to 1.39M 38K to 1.56M 125K to 2.0M

PLL Macro Lineup

Input frequency Parameter CMOS-N5 CMOS-9HD EA-9HD CMOS-10HD CMOS-12M DPLL (F9E4) for skew adjustment - 33 to 80 33 to 80 2.5 V: 33 to 133 1.8 V: 25 to 66 - DPLL (F9H2) for multiplication - 33 to 100(x2) 33 to 80(x1) 33 to 100(x2) 33 to 80(x1) - - DPLL (F9H3) for multiplication - 25 to 100 25 to 100 2.5 V: 33 to 133 1.8 V: 25 to 66 - Analog PLL - - 4 to 160 - - PLL phase-shift macro - - - - 25 to 200

(Unit: MHz)

SSCG Macro Lineup

Parameter CMOS-N5 CMOS-9HD EA-9HD CMOS-10HD CMOS-12M PLL SSCG macro for EMI noise reduction - 6 to 100 6 to 100 2.5 V: 7 to 120 1.8 V: - 2 to 200

(Unit: MHz)

High-speed I/O Lineup

Input/output frequency Parameter CMOS-N5 CMOS-9HD EA-9HD CMOS-10HD CMOS-12M VDD=5.0 V VDD=3.3 V VDD=3.3 V VDD=2.5 V VDD=1.5 V PCI - 33/33 33/33 66/66 66/66 GTL+ - 100/100 100/100 250/100 - PECL - 156/- 156/- 200/- 300/- SSTL2 - - - 250/200 300/300 SSTL3 - - - 200/200 300/300 LVDS - - - 200/156 333/333

(Unit: MHz)

RAM Macro Lineup

Parameter CMOS-N5 CMOS-9HD EA-9HD CMOS-10HD CMOS-12M Bit-word fixed type RAM High density asynchronous 1-port (4 to 40 bits) 16 to 2K 16 to 4K 16 to 4K - - High density asynchronous 2-port (1W+1R) (4 to 40 bits) 16 to 512 16 to 4K 16 to 4K - - Compiled type RAM Synchronous 1-port (1 to 128 bits) - - - 4 to 1K 4 to 1K (1 to 72 bits) Synchronous dual port (1R/W+1R/W) (1 to 128 bits) - - - 4 to 1K - Synchronous 2-port (1W+1R) (2 to 128 bits) - 4 to 1K - - - Synchronous 2-port (1RW+1R) (1 to 72 bits) - - - - 4 to 1K Asynchronous 1-port (2 to 128 bits) - 4 to 1K - - - Asynchronous 2-port (1W+1R) (2 to 128 bits) - 4 to 1K - - - Compiled type RAM (embedded) High-speed synchronous 1-port (1 to 32 bits) - - 32 to 2K - - High-speed synchronous 2-port (1W+1R) (1 to 32 bits) - - 32 to 2K - - High-density synchronous 1-port (1 to 32 bits) - - 16 to 2K - - High-density synchronous 2-port (1W+1R) (1 to 32 bits) - - 32 to 1K - - Synchronous 1-port (VX type) (1 to 32 bits) - - 32 to 8K - - Synchronous dual port (1RW+1R) (1 to 32 bits) - - - - 512 to 16K ROM Synchronous (1 to 64 bits) - - 64 to 8K - - Asynchronous (4 to 32 bits) - 128 to 2K 128 to 2K - -

(Unit: word count)

Core Lineup

Parameter CMOS- N5 CMOS- 9HD EA- 9HD CMOS- 10HD CMOS- 12M Programmable DMA controller (µPD71037 or equivalent) Ο - - - - Serial control unit (µPD71051 or equivalent) Ο Ο Ο - - Programmable timer counter (µPD71054 or equivalent) Ο Ο Ο Ο - Parallel interface unit (µPD71055 or equivalent) Ο - - - - Interrupt control unit (µPD71059 or equivalent) Ο Ο Ο - - UART with FIFO (PC16550D or equivalent) Ο Ο Ο Ο Under development PCI macro - - - Ο - DDR controller - - - - Under development

Remark

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