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Products > ASIC > Gata Array and Embedded Array >

Design Flow


When actually designing a NEC Electronics G/A, a design environment (design tool) is needed. As the G/A design environment, NEC Electronics supports OPENCAD™,which integrates NEC Electronics original tools and commercial tools. The flow of G/A development can be broadly divided into two techniques.


Design Flow

One is a technique that creates a circuit diagram using the necessary items from the function block list (library) provided by NEC Electronics. This is generally known as design by schematic entry.

The other is a technique that functionally describes the desired circuit configuration in a high level language (such as VHDL or Verilog HDL) and uses a logic synthesis tool to convert this to a circuit diagram. This is generally known as top-down design.

In order to investigate whether or not the circuit diagram created is correct functionally and with respect to timing for the specifications being sought, simulation is executed using expected value data called a test pattern. NEC Electronics has prepared results are equivalent to the actual behavior of a chip. This makes it possible for a user to prevent chip rework due to circuit design mistakes in advance, which decreases the turn around time and NRE (development cost). NEC Electronics also has put together a wide range of element technologies, such as CTS, PLL, BIST, scan path, and boundary scan, as means of realizing "high performance" and "easy testing technology".


  • Design for High Performance
    High speed systems require the tight control of clock skew. Clock tree synthesis(CTS) is a technique that minimizes clock skew between flip-flops,and Digital phase locked loop (DPLL) minimizes clock skew between chips.
  • Design for Testing
    NEC Electronics supports the automatic test pattern generation with high fault coverage through a scan-test methodology and JTAG(boundaryscan) test method standardized by IEEE Standard 1149.1. NEC Electronics also offers Built-in self test (BIST) for RAM testing.