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Idea 1: Rapidly fix a bug in your SoC
You go to the expense of designing a cell-based SoC, but when you get to silicon, you find bugs. What do you do?
Many design teams have faced this problem and decided that respinning the SoC would cost too much (hundreds of thousands of dollars) and cause them to miss their market windows. The respin also carries the risk that it, too, might have bugs. The solution is to create a workaround in a gate array and use it alongside the SoC—at a cost considerably lower than would be required to respin the SoC.
