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Products > ASIC > Gate Arrays and Embedded Arrays > Product Lineup >

CMOS-9HD Series



  • CMOS-N5 5V system
  • CMOS-9HD 3.3V system
  • EA-9HD 3.3V system
  • CMOS-12M 1.5V system

Product OverviewMaster/Package Lineup

CMOS-9HD Series Product Overview

CMOS-9HD is a high-density, high-speed 3 or 4 layer Gate Arrays fabricated via a 0.35µm CMOS process.
Available high-speed buffers include PCI and GTL+, and cores include multiplier PLL, timer, UART, etc.
SSCG (Spread Spectrum Clock Generator) macro is used to reduce EMI noise.


Special Features Application Application Examples Specification


Special Features

  • 0.35µm drawn gate length
  • 3.3V supply voltage
  • Ambient operating temperature from -40 to +85°C (industrial)
  • High-speed I/Os: GTL, GTL+, HSTL, SSTL, pECL, PCI

Application

  • 3.3V single-drive medium/large-scale system
  • Mixed 3.3V/5V medium/large-scale system
  • 3.3V single or mixed 3.3V/5V I/F circuits

Application Examples


Specification

Item Specification
Process 0.35 µm CMOS process
Number of usable gates 11,207 to 1,500,000 gates
Supply voltage 3.3±0.3 V, 3.3±0.165 V, 3.0±0.3 V
Delay time Internal gate 131 ps (F/O=1, typical wire length)
Power gate 107 ps (F/O=1, typical wire length)
Input buffer 229 ps (F/O=2, typical wire length)
Output buffer 1.396 ps (IOL=9 mA, CL=15 pF)
Maximum operating frequency 100 MHz
Output drive capacity IOL=1, 2, 3, 6, 9, 12, 18, 24 mA
Operating ambient temperature TA=-40 to 85°C
I/O buffer 3.3 Type, 5 V tolerant, PCI, GTL+, oscillation block (MHz band)
Memory macro -Synchronous high-speed dual-port compiled RAM
-Asynchronous high-speed single-/dual-port compiled RAM
-Asynchronous high-density single-/dual-port RAM, ROM
Mega macros -Serial control unit
-Programmable timer counter
-Interrupt control unit
-UART
Test related SCAN, BSCAN
Other macros CTS, DPLL (for phase control, for multiplication), SSCG


Inquiry Concerning Gate Arrays



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