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Five features (merit)
Rich master slices
NEC Electronics provides 10 types of master slices, µPD66201 to 66210, which vary according to the combinations of memory capacity and gate count. One example is a master slice that can incorporate 2.7 Mb SRAM (memory) and 1.6 M gates (usable gates).
Employing 0.15 µm CMOS process
The delay time of the CMOS-12M that features a 0.15 µm CMOS process is 60% shorter than that of gate arrays that feature a conventional 0.25 µm CMOS process. A system clock frequency of 200 MHz is achieved.
Supporting large-scale memory
One chip has multiple specially designed 16 Kb dual-port SRAM (1R/W + 1R/W) blocks, which realizes an integration density of the CMOS-12M that is around 10 times higher than that of gate arrays that feature a conventional 0.25 µm CMOS process (µPD66206 to 66210 are 18 kb).
Embedded PLL and slave DLL
Two types of analog PLLs--the SSCG (Spread Spectrum Clock Generator) type and the phase-shift type--are provided and embedded depending on the master slices. slave DLLs are provided for the five master slices (µPD66206 to 66210), which enables the connection between the master slices and DDR memory.
Up to 4 power supplies can be connected
The internal power supply voltage of the CMOS-12M is 1.5 V.
This gate array can interface with external power supply voltages of 3.3 V, 2.5 V, 1.8 V, and 1.5 V.
Three types of power supply lines are provided for each chip: (1) the internal power supply line, (2) the high-speed I/O power supply line, and (3) the peripheral power supply line for the standard I/O, which interfaces with an external power supply voltage of 3.3V.
A voltage of 2.5V, 1.8 V, or 1.5 V can be supplied to the high-speed I/O power supply line of each side of a chip. This means the user can freely set power supply voltage according to each side of a chip.
