µPD72042B
Overview
The µPD72042B is a microcomputer peripheral IC device for IEBus protocol control.
The µPD72042B performs all the processing required for layers 1 and 2 of the IEBus. The device incorporate large transmission and reception buffers, allowing the microcomputer to perform IEBus operations without interruption. They also contain an IEBus driver and receiver, allowing them to directly connected to the bus directly.
Features
- Control of layers 1 and 2 of the IEBus protocol
- Support of a multi-master scheme
- Broadcast function
- Two communication modes having different transmission speeds can be selected.
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fX
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6 MHz
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6.29 MHz
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Mode0
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Approx. 3.9 Kbps
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Approx. 4.1 Kbps
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Mode1
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Approx. 17 Kbps
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Approx. 18 Kbps
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- Built-in IEBus driver and receiver
- Transmission and reception buffers
Transmission buffer : 33 bytes, FIFO
Reception buffer : 40 bytes, FIFO (capable of holding more than one frame of reception data.)
- Microcomputer interface
Three-/two-wire serial I/O, transfer starting with LSB
- Program crashes can be detected by means of a watchdog timer.
- Low power consumption (standby mode): 50 µA (max)
- Oscillator frequency (fX): 6 MHz, 6.29 MHz (frequency accuracy: ±1.5%)
- Operating voltage: 5 V ±10%
Ordering Information
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Order Code
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Package
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µPD72042BGT
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16-pin plastic SOP (9.53 mm (375))
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Block Diagram
Inquiry Concerning IEBus™ Protocol Control LSI
Japan
