First, these terms are read "sisk" and "risk", and they are acronyms that stand for the following:
CISC: Complicated Instruction Set Computer
RISC: Reduced Instruction Set Computer
As microprocessors have evolved, processing speeds have increased and instructions have become more complex.
Designers realized that if, for example, there are three instructions representing basic functions A, B, and C, it would be convenient to also have single instructions that can execute complex combined processing such as A + B, B + C, or A + B + C, as well as a lot of addressing. Addressing has also been diversified to include not only direct addressing, where the access address is described as the operand, but also indirect addressing, where the contents of various registers are used as the access address, or the contents of multiple registers are combined and made the access address, etc.
This trend led to the development of the CISC concept. However, although not all instructions are actually frequently used, the number of instructions became very large.
The more instructions there are, the heavier the load on the instruction decoder, whose job it is to analyze the instructions (determine what needs to be done) before they are executed. It is time-consuming to do this analysis by software, and it increases the scale of circuitry to do it by hardware. Moreover, a large circuit scale means that more power is required to deliver the required processing speed. Complex addressing also leads to a heavy processing load during instruction execution.
The RISC concept was introduced to overcome these problems by limiting the instruction set to the basic instructions used most frequently.
Note that the spelling differs from "risk", and thus the meaning is not "risky microcomputer."