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Support > FAQ > Microcomputer > V850 Series >

  See also "Common Items FAQ : PCB"

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Contents

    
FAQ-ID = v85etc-nnnn
0001: Composite theoretical performance of uPD703015A (V850/SA1)
0002: Image of the internal peripheral I/O area
0003: Baking time
v85etc
-0001
Composite theoretical performance of uPD703015A (V850/SA1)
Q1
Tell me about the composite theoretical performance of the uPD703015A (V850/SA1). *** CTP Value ??? MTOPS *** Encryption Yes or No
A1
The composite theoretical performance value (CTP) is 4.5(Mtops).
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(2006/04)

v85etc
-0002
Image of the internal peripheral I/O area
Q1
In "3.4.5 Area - (3) On-chip peripheral I/O area" of the V850/SB1 User's Manual (U13850EJ6V0UM00 6th Edition), there is a description saying,
"The V850/SB1 and V850/SB2 are provided with a 1KB area of addresses FFF000H to FFF3FFH as a physical on-chip peripheral I/O area, and its image can be seen on the rest of the area (FFF400H to FFFFFFH)."

What does "the image can be seen" mean?
A1
Because addresses are not completely decoded, the same contents can be seen at multiple addresses.
Such contents are called an image.
In this case, because A11 and A10 are not decoded, the same contents can been seen at multiple addresses, as shown below:

FFF000H is equally referenced by FFF400H, FFF800H, and FFFC00H.
FFF001H is equally referenced by FFF401H, FFF801H, and FFFC01H.
FFF002H is equally reference by FFF402H, FFF802H, and FFFC02H.
:
:
FFF3F8H is equally referenced by FFF7F8H, FFFBF8H, and FFFFF8H.
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(2006/04)

v85etc
-0003
Baking time
Q1
How many hours are required for baking?
A1
You can refer to the relevant information at the following URL.
Confirm the baking time on this home page.

Semiconductor Device Mount Manual : Soldering Conditions
http://www.necel.com/pkg/en/mount/3/3_4/3_4_5/index.html
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