Memory Allocation.. Directives, LOCATION

Please tell me how I can assign variables to internal expansion RAM or buffer RAM.
Also, I would like to know how to assign them to external expansion ROM or RAM.

Each device includes multiple memory areas, some of which are used for specific purposes such as internal expansion RAM or buffer RAM. Both ROM and RAM can also be expanded externally.
When using a C compiler to create a program, certain variables and code are sometimes assigned to some of these memory areas.

In such cases, the following steps can be used to assign variables or code to memory.
Basically, there are only two steps:

1. Enter a #pragma section directive before the declaration of the variable or code in order to change the section name of the variable or code to be assigned.
   When assigning to several segments, enter a #pragma section directive for each segment name before declaring the variable.
   
   
2. Use a link directive to link the segments described above to specific addresses.
   

Two examples are described below.

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Example 1: Assigning variables to the uPD780058Y's internal RAM areas

In this example, the following variables and segment names are assumed as those to be assigned to different types of memory.

Memory type Size Address Variable name Segment name ----------------------------------------------------------------------------------------- (1) Internal high-speed RAM 1 Kbyte (FB00 to FE1F) a, b, c @@DATA (default) saddr area (FE20 to FEFF) x, y, z @@DATA (default) (2) Buffer RAM 32 bytes (FAC0 to FADF) serbuf[32] BUFSEG (3) Internal expansion RAM 1 Kbyte (F400 to F7FF) extdbuf[1024] EXTDSEG

The ordinary source code includes a definition of the variable to be assigned to internal high-speed RAM. When sreg is declared, it is assigned to the saddr area.

main.c

extern char serbuf[32]; extern char extdbuf[1024]; int a, b, c; sreg int x, y, z; void main() { }

In the source code shown below, if #pragma section is not at the start, the CC78K cannot directly output a REL file. Instead, an ASM file is output, and "output assembler source file" is set to ON by the data.c compiler option (-a).

data.c

#pragma section @@DATA BUFSEG char serbuf[32]; #pragma section @@DATA EXTDSEG char extdbuf[1024];

Create a link directive.
Specify this link directive by the linker option (-d linkdir.dr). In the Project Manager, this can be specified in the "other" part of the linker option settings.

linkdir.dr
merge BUFSEG : =LRAM merge EXTDSEG : =IXRAM	(a) (b)

(a) The BUFSEG segment is assigned to the buffer RAM area. "LRAM" is the name of the memory area defined in buffer RAM (32 bytes).

(b) The EXTDSEG segment is assigned to the internal expansion RAM area.
"IXRAM" is the name of the memory area defined in the internal expansion RAM area (1 Kbyte).

For further description of these defined memory area names, see the device file documentation.
This description is found under "default link directive information."
If you cannot find this description, see "MEMORY = XXX" in the description of link map files.

Since variables a, b, c, x, y, and z are assigned to the default area, they do not have to be specified.

Examine the link map file in the build results to confirm whether or not variables have been assigned to memory as intended.
(Specify "ON" for "Output public symbol list" by setting the linker option (-kp).)

s0l.map

*** Public symbol list *** MODULE ATTR VALUE NAME (Other symbols are omitted) main ADDR FB78H _a main ADDR FB7AH _b main ADDR FB7CH _c main ADDR FE20H _x main ADDR FE22H _y main ADDR FE24H _z data2 ADDR F400H _extdbuf data1 ADDR FAC0H _serbuf

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Example 2: Connecting external ROM or RAM to the uPD780056Y and assigning code and variables.

The memory types and the variables, codes, and segment names assumed to be assigned to memory are listed below. Hexadecimal files are output separately to internal ROM and external ROM.

Memory type Size Address Variable name Segment name ------------------------------------------------------------------------------- (1)Internal ROM 48 Kbytes (0000 to BFFF) main() @@CODE (2)External ROM 4 Kbytes (C000 to CFFF) sub() GROMSEG (3)External RAM 1 Kbyte (D000 to D3FF) gaibubuf[1024] GRAMSEG

Variables assigned to internal ROM are defined in the ordinary source code.

main.c

void sub(); void main() { sub(); }

Functions assigned to external ROM are described in source code that starts with a #pragma section.

sub.c

#pragma section @@CODE GROMSEG extern char gaibubuf[1024]; void sub() { gaibubuf[1] = 123; }

Functions assigned to external RAM are described in source code that starts with a #pragma section.

data.c

#pragma section @@DATA GRAMSEG char gaibubuf[1024];

The next step is to create a link directive.
Specify this link directive via the linker option (-d linkdir.dr).
In the Project Manager, this can be specified in the "other" part of the linker option settings.

linkdir.dr
memory GAIROM : (0C000H,1000H) /EX1 memory GAIRAM : (0D000H,0400H) merge GROMSEG : =GAIROM /EX1 merge GRAMSEG : =GAIRAM	(a) (b) (c) (d)

(a) Defines the external ROM area.

The memory area name "GAIROM" is assigned to the external ROM area from 0C000H to 1000H (4 KB).
By defining a memory space as /EX1 separate from internal ROM, separate hexadecimal files can be output.

(b) Defines the external RAM area.

The memory area name "GAIRAM" is assigned to the external RAM area from 0D000H to 0400H (1 KB).

(c) Assigns the GROMSEG segment to the external ROM space.

Here also, the target memory space is a separate space as /EX1.

(d) Assigns the GRAMSEG segment to the external RAM space.

A link map file in the build results can be checked to confirm whether or not memory assignments have occurred as intended.
(Specify "ON" for "Output public symbol list" by setting the linker option (-kp).

s0l.map

*** Public symbol list *** MODULE ATTR VALUE NAME (Other symbols are omitted) main ADDR 0111H _main sub ADDR C000H _sub data ADDR D000H _gaibubuf

This is a hexadecimal file for the internal ROM. (Start-up routine and main.c)

main.hex

:0200000080007E :1000800061D0EE1C20FE9AEC001000000354FB032C :1000900040FB0344FB400342FB1058FB0356FB1696 :1000A00080001478FBC6EA8000AD0687958684FA46 :1000B000F41678FBC6EA78FBAD06A1009786FAF441 :1000C0001680001420FEC6EA8000AD06879586845F :1000D000FAF41620FEC6EA20FEAD06A1009786FAC5 :1000E000F49A11011000009AED00FAFEAF0240FBF5 :1000F0003061013027D667616EAD129696B7C6CAD9 :1001000000FBD68730AE01B69A0F01FAE9FAFE314C :010110009856 :040111009A00C0AFE1 :00000001FF

This is a hexadecimal file for the external ROM. (sub.c)

main.H1

:06C00000A17B9E01D0AF00 :00000001FF

In a 78K0 device, the address range from 0000h to 7FFFh is allocated as the ROM area and the address range from 8000h to F7FFh is allocated as the external RAM area. However, the error message "ignored as outside of target memory area" is output when the assembler (or linker?) has reached the following code.

   data2   dseg  8000h
   tmp:    ds    2

Why cannot this method be used to access an external memory area?

This error occurs because the existence of the external RAM has not been declared by a link directive.
Use an editor to insert the following memory directive into a link directive.

   MEMORY RAMEX : (8000H,7800H)

In this memory directive, "RAMEX" is the name of the added external memory area (specify a name that is not already being used). Use the linker option -D to specify the file name of the link directive created in this way.
For further description, see sections 6.4 Link Directives and 6.6 Linker Options in CHAPTER 6 LINKER of the RA78K0 Assembler Package Operation User's Manual.

Can the uPD784218 be used as an external ROM version device (via the same method as a ROMless version device)?

That is possible, but it is not recommended.
For a ROMless device, we recommend the uPD784031 over the uPD784218.
When a program is executed via an external ROM device (including the uPD784031), the processing speed is much slower than when executing the program in internal ROM.
Since interrupt services are performed via the internal ROM, it should also be noted with caution that interrupt responses may be adversely affected when external ROM is used for program execution.

In view of these two considerations, this objective (jumping to external processing) can be implemented as described below.

(1) Minimize processing in internal ROM.
To do this, perform only initialization processing (required parts related to use of external memory) after a reset, then branch to a specified external address.

(2) For other interrupt vectors as well, write (to the internal ROM) processing that branches each interrupt source to a specified external address.
This enables internal ROM to be used as an intermediate step for branching processing to external ROM.
Naturally, previously specified addresses are used as the branch destinations for resets and interrupts.

When using the LOCATION 0 instruction with the uPD78F4935, memory is split into two address ranges, from 00000H to 0EAFFH and from 10000H to 17FFFH. Will the device operate correctly if instructions such as the following are used?

   MOVW HL, #TEST
   MOV  A, [HL]
   
   TEST: <- Address is in the range from 00000H to 0EAFFH
        DB   00H, 00H, 00H, 00H

"MOV A, [HL]" is processed as "MOV A, [WHL]" in this event. Consequently, the result differs depending on the contents of the W register.
Problem-free operation can be ensured by setting "0" to W at the start of the program, if it is within the indicated range.

Must 24-bit instructions be set in order to access RAM for LOCATION 0FH in uPD784936?

No. Some memory areas do not require the use of 24-bit instructions.
For example, 8-bit offset addressing is enabled in the saddr area (0XFD20H to 0XFF1FH: "X" is either "0" or "F" in the LOCATION instruction).

When setting LOCATION 0, when the following operation is performed in the base area (0 to FFFFH):

    MOV  A, #0
    MOV  [DE], A

it seems that [TDE] is set instead of [DE].
How can this setting be changed to use [DE] is set instead of [TDE]?

This problem is not due to the assembler but rather to the device's own instruction set.
In 78K4 devices, only 24-bit register indirect addressing is allowed for memory access.
16-bit addressing can only be used with the ROR4 and RL4 instructions.
To target only the DE register, try using indexed addressing.

      MOV   0[DE], A

The above example shows the format (a 5-byte instruction).
We recommend setting "0" to the T register and then using the "MOV [DE], A" instruction.
With this format, a single-byte instruction should suffice.

Please explain the characteristics of the LOCATION 0H and LOCATION 0FH instructions and how each is used.

The most easily understood characteristic is the continuation of the program area.
When the LOCATION 0FH instruction is used, ROM continues from 0 to 17FFFH, an area that is easy to create as a program area.

On the other hand, with the LOCATION 0 instruction, the internal RAM is allocated to the first 64 Kbytes of memory space, so instructions such as "MOV !addr16, #byte" and "MOV !addr16, r" can be used, which makes for a shorter instruction length compared to LOCATION 0FH.

Also, a medium model can be used effectively when creating programs using the CC78K4, which can reduce the program size.

Please explain any restrictions that may apply in these cases.

Some restrictions do apply (for example, for the LOCATION 0H instruction the program area must be split).
Other restrictions should be determined from the memory map.

The uPD784936's base area is described as "The space from 0 to FFFFH comprises the base area." in section 3.3 Base Area of the User's Manual.
In Note 4 to Figure 3-2, the area from 0 to 1FFFFH is described as the base area.
Which is correct?

The base area is from 0 to FFFFH.
The base area referred to in Figure 3-2 should be considered an area within this base area.

An error occurs when using the following link directive with LK78K4 for linking.

    memory ROM :(0, 0EE00H)
    memory RAM :(0EE00H, 1100H)

The problem lies in the RAM area definition.
In 78K4 devices, RAM must include the SFR area.
In the inquiry settings, definitions go only to just before the SFR area.
Change the RAM size from 1100h to 1200h.
This problem is probably what causes the F111 error, and subsequently the F304 error.

When using the MOVW instruction to access RAM, must even-numbered addresses be used?

Although it has not been stipulated that word data in RAM must be aligned to even-numbered addresses, when they are so aligned they can be accessed in one operation, while two operations are required when they are aligned to odd-numbered addresses, which creates the potential problem of slower processing speed.
Therefore, aligning word data to even-numbered addresses is recommended.
This even-numbered address alignment of word data is also to be recommended because it is more compatible with C language.

In 78K0 devices, such as when a "MOVW AX, 0FE20H" instruction is executed, what are the respective address values that are stored to register A and register X?

The contents of address FE21 are stored to register A and the contents of address FE20 are stored to register X.
Basically, this CPU operates in little endian order, so low data values correspond to low address values (however, note with caution that in the case of the "MOVW AX, saddrp" instructions, only even-numbered addresses can be specified).

To which addresses should 78K0S device's general registers be mapped?

In a 78K0S device, registers are not allocated as part of memory mapping.
This is why memory mapping is not described in the manual.

In the uPD789012, the CALLT table is assigned to 0040H to 007FH. Can this area be used as a program area?

Use "AT" in the source code to specify an address for the section name (in this case, SEG1) to be allocated, such as is shown in the example below.
Here, addresses starting from 40H can be used.
Actually, if there are no vectors, even addresses before 40H can be used.

      SEG1    CSEG    AT  40H

If the CALLT instruction is used effectively, it may result in a shorter program than when this method is used.

In the 78K0R/Kx3 manual, the bit count of the stack pointer is described as 16 bits.
When setting an address to the stack pointer, should the lower 16 bits be set for the actual RAM address? In the case of the uPD78F1144, the RAM area being FDF00H to FFEFFH (20-bit equivalent), are the higher 4 bits set to FH automatically?

Yes. The 78K0R memory space is a 20-bit address space, and the RAM area to which the stack is allocated differs according to the product, but even in the case of a 30 KB product, it is F8700H to FFEDFH.
Therefore, the higher 4 bits are always FH and so are fixed to FH, and the lower 16 bits can be set for the stack pointer.