Background Knowledge

2's complement expressions are often used to express negative numbers. An easy example showing the numbers that can be expressed in 8 bits (-128 to +127) is provided in the table below.

Binary number	Number expressed in decimal	Binary number	Number expressed in decimal
00000000	0	10000000	-128
00000001	+1	10000001	-127
00000010	+2	10000010	-126
00000011	+3	10000011	-125
: :	: :	: :	: :
01111100	+124	11111100	-4
01111101	+125	11111101	-3
01111110	+126	11111110	-2
01111111	+127	11111111	-1

As you can see from this example, if the most significant bit (MSB) is 0, it indicates that the number is positive, and if the MSB is 1, it indicates that the number is negative. When the negative number is actually converted into a 2's complement number, it is easy to subtract from 0, but when subtraction cannot be used, the conversion can be performed by inverting the logic of each bit and adding 1. Examples using -100, -10, and -1 are shown below.


When performing addition or subtraction using a 2's complement expression, as long as the result does not overflow, the sign bit need not to note. 2's complement is particularly useful when expressing a negative number because subtraction can be performed simply by performing addition.
An example of subtracting 5 from 4 is shown below.


Note, however, that caution is required when adding 2's complement numbers that have a different number of digits. In this case, the numbers must be sign-extended before being added.

(2006/04)

This refers to resolving the right of access to prevent conflicts due to simultaneous access, for example when multiple active devices share a resource. As a result of arbitration, once the highest priority access has ended, the next priority access, which was suspended, gets performed.
The frequently used term "bus arbitration" refers to arbitration of the bus use right in a microcontroller system. For example, in the case of DMA, through a handshake between a DMA controller and a CPU, the CPU goes into the hold state and the DMA controller acquires the bus use right and executes data transfer.
Among three or more devices, a bus arbiter performs arbitration for them.

(2007/03)

Numbers used for numeric representation are determined at which value a "carry" occurs.

In daily life, we use the decimal system that uses numbers 0 to 9. After 9, a carry occurs from the first digit to the next and we reach 10(ten). As exceptions, clocks use numbers using 12 or 60 for a base.

For digital data processing, the binary number system, in which only two numbers, 0 and 1, are used, is used. This is because digital signals are defined by a voltage of low level (L = 0) or high level (H = 1) .
In the binary system, a carry to the next digit occurs after 1, and thus we have "10"(one-zero). To distinguish a binary number "10", from that in the decimal system, it is represented as "10b" or "10B".

In microcontrollers, the hexadecimal system is also used because, with only the binary system, the number of digits is too many. Four digits of a binary number is equivalent to one digit of a hexadecimal number.
In the hexadecimal system, alphabetic characters A to F are used following 9. A carry occurs after F (15 in decimal) and we have "10" (one-zero) . To distinguish "10" in hexadecimal from "10" in decimal,it is represented as "10h", "10H", or "0x10".

Decimal	Binary (b)	Hexadecimal (h)
00	0000 0000	00
01	0000 0001	01
02	0000 0010	02
03	0000 0011	03
04	0000 0100	04
05	0000 0101	05
06	0000 0110	06
07	0000 0111	07
08	0000 1000	08
09	0000 1001	09
10	0000 1010	0A
11	0000 1011	0B
12	0000 1100	0C
13	0000 1101	0D
14	0000 1110	0E
15	0000 1111	0F
16	0001 0000	10

In decimal system, we define the units digit, tens digit, hundreds digit, and so on, which respectively correspond to digits 10⁰, 10¹, 10², and so on. Similarly, the digit increases from 2⁰ to 2¹, 2², and so on, in the binary system. In the hexadecimal system, it increases from 16⁰ to 16¹, 16², and so on.
For example, "123" in decimal (1 × 10², + 2 × 10¹ + 3 × 10⁰ ) is expressed in hexadecimal and binary systems as follows.
Hexadecimal: 7 × 16¹ + 11 × 16⁰ → 7B
Binary: 1 × 2⁶ + 1 × 2⁵ + 1 × 2⁴ + 1 × 2³ + 0 × 2² + 1 × 2¹ + 1 × 2⁰ → 1111011

In the digital field, such numbers as 128 and 256 are often used. These are equivalent to 2⁷ and 2⁸.
In other words, 8 bits (digit) can process 256 numbers (0 to 255) at one time.

Operations that handle decimal numbers, such as those of a digital watch or a calculator, may be processed in binary system in digit units. Such decimal numbers processed in binary is called a binary coded decimal (BCD) .
For example, suppose the result of a binary operation is "00010111b" (17h) . This is equivalent to "23" in decimal, and therefore, conversion from binary to decimal is necessary. In contrast, a BCD operation controls carry, executes the operation on each digit by using numbers 0 to 9 (1001b) , and outputs the result as "2" and "3". Therefore, binary-to-decimal conversion is not necessary for a BCD operation.

This originally means to lift up the basic level in order to make processing possible.
For example, when dealing with numbers ranging from -128 to +127 in a program processing, it is also possible to express negative numbers using a range of 0 to 255 (8 bits from 0 to FFH) by defining an offset of 128 (80H) as the bias. In this case, 00H to 80H correspond to -128 to 0, and 81H to FFH correspond to 1 to 127. If the operation result is smaller than 80H, it is a negative number.

[Tea Break] To express negative numbers, one can use 2's complements with MSB regarded as a sign. In this case as well, numbers in the range of -128 to +127 are handled using just 8 bits. When bit 7 (MSB) is 1, this indicates a negative number; 00H to 7FH correspond to 0 to 127, and 80H to FFH correspond to -128 to -1.

The bias in an electric circuit consists of the application of a DC voltage to obtain a practicable state. In amplifiers, to enable operation of the negative voltage part of an AC signal, an offset is applied with a bias voltage to raise it to the positive voltage side. For example, in the case of an A class amplifier consisting of bipolar transistors, an active state is kept by applying a bias voltage to the base to prevent the voltage from fluctuating below 0 V.



The A class amplifier consumes additional power for the bias. In comparison, a B class amplifier, consisting of a push-pull circuit combining an NPN transistor and a PNP transistor, can reduce the power consumption by operating alternately with a positive and negative voltage and synthesizing the output. A push-pull circuit uses two transistors with complementarity (whose characteristics are equivalent while of opposite polarity).



Since the circuit does not operate in a base signal that is closer to 0 V than the on-voltage (on the order of 0.6 V) between the base and emitter of each transistor, in the vicinity of 0 V, the synthesized output waveform of a B class amplifier warps. In the case of an AB class amplifier, the synthesized waveform is kept free of distortion through the application of a bias equivalent to the on-voltage.

[Tea Break] In the case of transistors and vacuum tube amplifiers, there are, in addition to the above A, B, and AB class amplifiers, C class and D class amplifiers. C class amplifiers, which do not apply a bias to elements, but instead amplify only the high input voltage parts and extract the high-harmonic component with a filter, are used for frequency multiplication circuits, etc. D class amplifiers perform digital switching by using the saturation region of elements, and are not pure amplifiers.

(2007/03)

bps is a unit of data transfer rate that indicates the number of bits transferred each second in serial communication. In the case of UARTs, a different unit, the baud, is used, and the baud rate refers to the number of modulations in a second.
The data part is transferred at the defined rate, but since data communication is done with frames, each consisting of a constant amount of data, the frame processing of the various communication protocols has overhead, and the time required by transfer is longer than the time obtained by dividing the amount of data by the transfer bit rate. Even more time is required when the transfer operation is interrupted by processing that has a higher priority than the data transfer.

(2007/03)

If a voltage exceeding the rating is applied to a PN junction diode in the reverse direction, the current will suddenly increase at a certain point. This phenomenon is known as breakdown. In the breakdown area, even a very slight change in voltage will cause a sudden current increase.

(2006/03)

In electronics, there are two kinds of buffers: buffer amplifiers that are used to stop noise transmitted from the output side to the input side, and buffer memory that is used to temporarily store transfer data. "Buffer" used here refers to this buffer memory.

A buffer is used when data that is input in variable amounts and at variable intervals is to be output at a fixed interval and in fixed amounts, and when data that is input at a fixed interval and in fixed amounts is to be output at random intervals. By using a buffer, data can be transferred smoothly between devices with different transfer rates.



Buffers usually use an FIFO system and are configured as a ring structure. The size of the buffer is determined by the I/O speed differential and timing of the data being handled. Note that it is too late to stop input of new data once the buffer is full, and that once the buffer becomes empty, the empty state will continue briefly even when new data has been requested. The amount of data being input to the buffer must therefore be carefully managed. In most cases, once the amount of data in the buffer has reached the upper limit value (e.g., 70 or 80%), an order to stop further data input is given. Subsequently, once data in the buffer is read causing the amount of remaining data to fall to the lower limit value (e.g., 20 or 30%), the input of new data is enabled. By controlling data input in the range between these upper and lower limits (hysteresis width), the system can avoid frequently and repeatedly entering disabled and enabled states.

This refers to the overflow of a buffer used to store data.
Buffers can be used in three ways to prevent overruns caused by a change in the processing speed when transferring data. In each case, however, the processing capacity on the receiving side must basically exceed the transmission speed.

The first method is to use handshake control. With this method, the receiving side sends the transmitting side a signal indicating that it can receive data, and gets the transmitting side to release wait. In this case, a buffer is required on the transmitting side. Because there is no buffer on the receiving side, if the receiving side reports that it cannot receive data, the transmitting side must stop transmitting data immediately. This means that the handshake timing is very important.



The second way buffers are used is to have a buffer on the receiving side. With this method, all the data sent by the transmitting side is stored in the buffer and is read out once the receiving side is ready. This means that there is plenty of time to read out the data after it is received. In this case also, although data can be received while there is still space in the buffer, once the buffer becomes full (i.e., the buffer overflows), data can no longer be received.

The third method is to provide buffers on both sides. The receiving side executes buffer management and sends the transmitting side a signal to stop sending data once data in the receive buffer reaches a certain level. Upon receiving this signal, the transmitting side stops transmission (once transmission is stopped, data is stored in the buffer on the transmitting side). With this method, there is more freedom in the timing because transmission does not need to be stopped immediately. The receiving side reads the data from the buffer and signals the transmitting side to resume transmission once the data falls to a certain level. → See also Buffer.

Bus arbitration is the process of performing arbitration between multiple devices that use the same bus, granting bus usage rights to individual devices so as to ensure smooth operation. The circuit that performs such arbitration is called a bus arbiter.
The device that obtains the bus usage right becomes the "bus master".

When the bus master ends access and releases the bus, the bus arbiter again performs arbitration between the various devices that request the bus usage right.

Basically, signals are connected from an output (point) to an input (point). Therefore, in parts configured of many storage elements, such as memory devices, when selecting an individual storage element by means of a point-to-point connection, the number of connected wires must equal the number of storage elements.



It is therefore necessary to reduce the number of wires by encoding the selection signals. When the selection signals are encoded, they become address information. Unlike the selection signals, one item of address information must be output to multiple inputs rather than to just a single input. This creates a bus configuration, known as an address bus.



By using an address bus in this way, the required specifications can be made using only a few signal lines. However, in this case, selection signals are still required for each storage device. As a result, processing to decode the address information must be added. For more information about decoding, see the Decoder FAQ.

For reference Address information is decoded in order to select one of the storage elements (memory cells) in a memory device, but this information is not simply decoded. Addresses are divided into rows and columns and in a memory device that is configured as a matrix array, the required memory cell is selected by combining two selection lines. This serves to reduce the number of signal lines, improving the level of integration. Moreover, the wiring can be further reduced by also using the selection lines as data readout lines.

Data also can be handled using a bus configuration. Moreover, by executing bidirectional transfer, the required number of signals can be further reduced. Decoding is not usually required with a data bus, but it must be made clear exactly when the data is valid. This means that in addition to the address and data buses, a separate signal is required for control. An example of writing data using a bus is shown below. In this example, the data on the bus is valid when the WR signal is active (low level).



There are also cases where addresses and data use a common bus to reduce the number of bus signal lines. In this case, use of the bus is determined according to time: during a certain period the bus is used as an address bus, and after that it is used as a data bus. With this method, the addresses and data are multiplexed, hence the term "multiplexed bus". When using a multiplexed bus, a dedicated control signal is required to ensure that the correct address information is fetched by the side receiving the signal. Address control signals with names such as ASTB are used to fetch address information (generate addresses) from the multiplexed bus. Generating addresses from a multiplexed bus requires a latch. For more information about latches, see the Latch FAQ.
Note that with a multiplexed bus, it is important to design the timing so that signals do not conflict while the bus is switching from an address bus to a data bus and vice versa. This is especially true with read operations because the data transfer direction also changes. (This is why an idle cycle-a cycle during which the bus is not accessed-is inserted after a read operation in many microcontrollers.)



This kind of bus can be used to reduce the number of signal lines and wiring, and is an important technology used by the developers of today's microcontrollers. One drawback, however, is the problem of signals becoming bottlenecked as the bus speed increases.

(2006/03)

The bus cycle is the period during which a bus is driven within an instruction cycle when a microcontroller executes an instruction. The basic functions of the microcontroller include I/O and memory input/output, calculation, and so on. Among these, input and output use bus driving, as a read cycle and write cycle, respectively.
In the latest microcontrollers, internal processing is performed at accelerated speed, resulting in a processing speed difference between the internal bus and the external bus. In the case of execution of instructions in the internal memory of such a microcontroller, instruction fetch is possible with just 1 bus cycle.

[Tea break] A bus is a set of lines used to simultaneously transfer a group of data, and is named thus by analogy to the transportation vehicle "bus" on which many people can ride at a time. The term "bus" usually indicates address busses and data busses, which enable easy connection of multiple devices.

(2007/03)

Bus sizing is the process of setting or changing the external data bus width of a bus master device according to the data bus width of the access target device.

For example, when performing memory or I/O access with an external 32-bit data bus CPU, the memory or I/O must be a 32-bit data bus device. However, using the bus sizing function, it is also possible to access 16-bit data bus memories or I/Os by setting the external data bus width of the CPU to 16 bits.

There are two types of bus sizing, static bus sizing and dynamic bus sizing. Static bus sizing sets the bus width with the pin potential at startup only, whereas dynamic bus sizing can change the bus size during operation with the pin potential or register settings.

Some CPUs also allow splitting of the memory space into several blocks and specifying a different bus width to each block.

Bypass capacitors are used to provide an AC path around a circuit element. They come in two types.
The first type is used for analog amplifier circuits. The signal in this type of bypass capacitor is connected in parallel to a current limiting resistor, so that it is not attenuated by that resistor.



The other type of bypass capacitor is placed in the required location on the board between the power supply and the ground, where it absorbs power supply noise on the board, performing the function of a smoothing capacitor in areas with a low current density. This type of bypass capacitor is particularly important in the vicinity of devices in which a large current flows or high-speed-operation devices.



The necessary capacitor capacitance differs depending on the system (such as the pattern, power capacity, and noise environment of the circuit board). A rule of thumb is as follows.
Place one ceramic capacitor (a few tenth of a uF) near each power pin of an LSI or one ceramic capacitor per several SSIs and MSIs such as gate ICs. On the entire circuit board, several electrolytic capacitors (several tens of uF) should be connected, though the number varies depending on the scale of the board.
Use ceramic capacitors with frequency characteristics that are as good as possible. Avoid higher capacitance laminated ceramic capacitors because some of these capacitors have poor frequency characteristics.
Place a ceramic capacitor near an IC that handles high-frequency signals, such as a clock, even if the IC is not an LSI.
Place an electrolytic capacitor near a part that handles a high current.

(2006/11)

When a CPU frequently accesses a vast data area, consisting not just of semiconductor memory, but also magnetic discs, CD-ROMs, and other external storage devices, such accesses take a long time, giving rise to inefficiency. Such inefficiency can be prevented by providing cache memory, which is internal memory that can be accessed at high speed, and used for high-access-frequency data read previously from external devices. Normally, user programs need not to be aware of the existence of cache memory. The CPU first accesses the cache memory, and accesses the target data if it is contained (cache hit). If the target data is absent (cache miss-hit), the CPU reads the block containing the target data from an external storage device, replaces it, and accesses that replaced data.



Moreover, some microcontrollers have a two-stage cache structure, using a block that is frequently accessed as the primary cache, separated from the secondary cache, for higher access efficiency.
As replacement occurs in a cache system, in semiconductor devices such as single-chip microcontrollers whose basic purpose is not to access vast data areas and high-speed access of internal memory of a certain capacity, cache memory would have the opposite effect of lowering processing efficiency and is therefore not used in such devices.

(2007/03)

This is a mode of connection by which each channel of a device that has two or more channels is connected in series to a device of similar type (the output of a device is connected to the input of the next-stage device) . As a result, the number of channels can be geometrically increased.
In the past, this connection was used to extend the interrupt requests of an interrupt controller.
Currently, it is used to increase the number of stream ports for Ethernet, USB, and IEEE1394.



In an amplifier using transistors, combination of emitter common and base common is also called cascade connection.

This is a phenomenon whereby a manual switch repeatedly turns on and off in a short time because of vibration of the contact.
This may cause malfunctioning of reset input and counter input.
Usually, chattering is eliminated by a combination of an RC circuit and a Schmitt trigger buffer.

The diode shown in the circuit example below is to discharge the capacitor so that the absolute maximum rating of the buffer input is not exceeded when the power is turned off.

Checksum is a technique for detecting errors of digital communication and computers. All data divided into each n bits is accumulated and the sum is attached at the end of the data for error detection. For digital communication, all data, including the sum data for error detection, is transmitted, and data divided into each n bits except the attached sum data is accumulated at the reception side. Errors are detected by verifying the result of accumulation with the sum data for error detection. The sum is not used as data for error detection but a 2's complement of the sum can be used. Data including that for error detection is accumulated at the reception side, and an error can be detected depending on whether all the bits of the result are "0".
For example, if 16-byte data "0xF001F102F203F304F405F506F607F708" is divided into 8 bits each and all 8-bit data is accumulated (ignoring overflow), the result is "0xC0". A 2's complement of this is "0x40". Therefore, 17-byte data "0xF001F102F203F304F405F506F607F70840" is transmitted. This data is divided into 8 bits each and all 8-bit data is accumulated, at the reception side, and the result is checked. If it is "0x00", it is judged that no error has occurred.
This checksum is used in a format for ordering the ROM code of a microcontroller having a ROM.

(2007/04)

"Clock" and "reset" are basic signals used in digital circuits, including those in a microcontroller.
[Clock]
With the exception of simple gate circuits, all digital circuits operate in synchronization with a clock. Required operations are performed by the repetition of basic processing executed in 1 clock cycle. By dividing operations into clock units in this way, multiple operations can be executed in a stable manner.

Coffee Break It is rare for an LSI to use a simple clock such as the one described above; LSIs more commonly use multiple clocks whose phases differ within the one clock cycle. An example of two clocks with different phases is shown below. As you can see, the clock phases do not overlap.

In this way, the clock becomes the signal that regulates the timing of operations. However, clocks are also used for other purposes, as shown below.

• To execute counting in a timer counter and obtain the required interval.
• To eliminate noise from an input signal.
• To detect the edge of an input signal.

[Reset]
Like the clock signal, reset is another basic signal. In digital circuits with flip-flops (F/F) or sequential circuits, the state of these circuits becomes undefined when power is applied. The reset signal is used to initialize these circuits to a certain state. Therefore, unless the reset signal works properly, these circuits are unlikely to operate expectedly after power application.



In some older devices, the reset signal was sampled by the clock and had a specified width of 2 or sometimes 3 clocks. As a result, a procedure was required whereby the power supply voltage had reached the operating voltage level, clock oscillation had stabilized, and then the reset signal had to be released after the specified number of clocks.
In recent microcontrollers, however, this is no longer required because these devices support a power-saving STOP mode in which clock oscillation itself can be stopped. Reset is one of the methods used to release STOP mode, so it is no longer the case that the reset signal cannot be accepted without a clock.
On the other hand, in some microcontrollers, the 78K0 and 78K0S Series for example, clock oscillation is actually stopped if a reset is applied, even if STOP instruction is not executed.
Some microcontrollers, whose reset is used mainly to initialize circuits at power application, used to require a dedicated reset IC to monitor the power supply voltage and apply a reset once the voltage reached a certain level. Recently, however, it has become common for these microcontrollers to incorporate a power-on clear (POC) circuit to execute this function.
Resets can also be operated by the watchdog timer — a circuit that restores normal operation if an anomaly is detected in the program. See the Watchdog Timer Basics FAQ for more information on the operation of the watchdog timer.

(2006/07)

[Introduction]
A clock is an essential item in microcontroller operations. Usually, the clock is oscillated internally by connecting a crystal or ceramic resonator and a capacitor to the microcontroller's on-chip oscillator, or a clock that is oscillated externally is used.
The crystal or ceramic oscillation circuit generates the clock by inverting (by 180°) the phase of the output of an inverting amplifier configured by adding the resonator, capacitor, and a feedback resistor to an inverter, then returning that output to the input.



[Oscillation stabilization time]
When the oscillator starts oscillating a clock, clock oscillation is not immediately stable. The amplitude of the clock signal gradually increases and the oscillation stabilizes at the frequency determined by the crystal or ceramic resonator. The time during which the frequency is increasing in this way is known as the oscillation stabilization time. During the oscillation stabilization time, the amplitude is small and the clock includes many high-frequency elements. This clock therefore does not satisfy the required specifications for operating a microcontroller, and must not be used until the oscillation has stabilized.

Coffee Break The oscillation stabilization time differs depending on the type and oscillation frequency of the resonator used as well as the circuit matching status. In the case of several MHz oscillation, if the matching is good, oscillation will stabilize in a few milliseconds with a crystal resonator or a few hundred microseconds with a ceramic resonator. When using a low-frequency resonator, such as a 32.768 kHz resonator used in watch applications, it can take several seconds for oscillation to stabilize.

[Securing the oscillation stabilization time]
There are two methods used to secure the oscillation stabilization time, and the method is alternated depending on the microcontroller. With one method, the oscillation stabilization time is automatically secured by the microcontroller, and with the other method, it must be deliberately secured by the user. Most 8-bit microcontrollers, such as the 78K0 and 78K0S, secure the oscillation stabilization time automatically. With V850 microcontrollers on the other hand, this time must be secured using the width of the reset signal when power is applied or when STOP mode is released by the reset.



The method whereby the microcontroller secures the oscillation stabilization time automatically at reset is easy to use, but does not allow the user more freedom. If there are problems with the system startup time at power application or following reset release, it may be necessary to make the oscillation stabilization time as short as possible. Furthermore, if the clock is supplied by an external oscillation, the oscillation stabilization time does not need to be secured. In these cases, it is better to use the method whereby the oscillation stabilization time is secured by the reset signal.

Coffee Break Microcontrollers such as the 78K0/Kx2 incorporate an oscillator with a short oscillation stabilization time so that the microcontrollers can be started up quickly. These microcontrollers can start operating by the on-chip oscillator as soon as the oscillator starts up. The 78K0S/Kx1+ has a function to select the clock. If either external clock supply or use of the on-chip oscillator is selected, it is not necessary to secure an oscillation stabilization time. In the case of microcontrollers with on-chip PLL functions, such as the V850, both an oscillation stabilization time and the time until the PLL locks must be secured.

(2006/09)

When multiple circuits are synchronized with a clock, a clock delay is generated and the setup time and hold time cannot be satisfied if there is a critical path that extends routing of the clock line or a gate clock with a logic gate installed on the clock line.
Consequently, the clock cannot sample data in the correct timing. This phenomenon is called clock skew.

This is the reverse current that flows when reverse voltage is applied to the PN junction between the collector and base and the emitter is open.
In the electrical specifications, the collector cut-off current is indicated by the symbol I_CBO.

(2006/04)

As the transistor's base current increases, a collector current of h_FE times as much as the base current flows.
However, no matter how much collector current flows by making the base current large, the voltage between the collector and emitter never becomes zero; a small amount of voltage always remains.
This voltage is known as the collector saturation voltage, V_CE (sat).

As the collector saturation voltage (V_CE (sat)) becomes larger, some of the power supply voltage is used by V_CE (sat) and becomes residual voltage when the transistor is turned on by a switching operation.
In an operation that requires a large amount of power, in particular, this lowers the efficiency and generates heat, so it is better to keep the collector saturation voltage as small as possible.

Information on the collector saturation voltage is also given in the following FAQ.

What are the differences between analog and digital?

(2006/05)

In a common base circuit, when the base is connected to a common ground, the emitter acts as input, and the collector is connected to load resistor, the output can be got from the collector.
This kind of circuit is used as a high-frequency power amplifier because there was little effect from feedback capacitance and its low input resistance. These days, however, common emitter circuits are more commonly used for high-frequency applications, and common base circuits are no longer often seen.

Related item
Common emitter circuit
Common collector circuit/Emitter follower circuit

In a common collector (or emitter follower) circuit, a load resistor is connected between the emitter and common ground. By directly connecting the collector to the power supply, the collector becomes the AC common ground.
A common collector circuit, also known as an emitter follower circuit, has a high input impedance, low output impedance, and large current gain, so even if a large current flows to the load, the output voltage will hardly change. It is therefore ideal for driving a heavy load.

Related items
Common emitter circuit
Common base circuit

In a common emitter circuit, when the emitter is connected to a common ground, the base acts as input, and the collector is connected to load resistor, the output can be got from the collector. Since a transistor is a current amplifying element, an output voltage of V_O = RL × I_C is obtained when the transistor is operated as a voltage amplifier.
This is one of the most commonly used circuits, and the input impedance is also relatively high and the I/O phase is inverted.
The key to design is how to select the operating bias point and load resistance.

Related items
Common collector circuit/Emitter follower circuit
Common base circuit

This is a phenomenon whereby a change in a signal line propagates on another signal line as noise.
If ringing such as overshoot or undershoot is generated, for example, noise easily propagates, depending on the capacitance between signal lines, and this noise increases under the influence of the inductance of the signal lines.

This is a mode of connection that connects slave devices in series (the output of a slave device is connected to the next-stage slave device) to one master device. This term was originated from a child play that connects daisy.
In a daisy chain connection, the interrupt priority of each device can be simply determined.
Note, however, that the delay time becomes long in a daisy chain connection because a signal is serially transmitted.
Therefore, a daisy chain connection is used for low-speed systems.

This is a circuit ac