Analog Switch IC

Can I use this IC with a single power supply?

Each of uPD5200, uPD5201, and uPD5205 is specified for use with a dual power supply, so you must not use it with a single power supply. Use it under the recommended conditions listed in the Data Sheet.

(2007/09)

What does "latch-up-proof architecture" mean? Does it mean that the architecture does not cause latch-up?

Since it is CMOS architecture, it could, in principle, cause latch-up.
"Latch-up-proof" does not mean that latch-up is prevented, but latch-up does not occur easily (that is, latch-up tolerance is improved compared to existing architecture).

(2007/09)

Under what conditions does latch-up occur?

If the potential of the power supply, GND pin, or S or D pin is in one of the following conditions, the IC can be damaged.

• If voltage is applied to the S or D pin when no power voltage is applied to the power supply pin V ⁺. (Because the parasitic diode consisting of channel P and substrate N turns on and overcurrent flows, if S or D potential becomes higher than V ⁺.)
• If GND pin voltage becomes at least V_F (diode forward breakdown voltage ≈ 0.7 V) higher than V⁺ pin voltage. (Because high current flows from the GND pin to Nsub.)

Especially in this case, if the potential of the S or D pin is low (such as being the same level as V^-), it's liable to break at the same time of power application.
Note the power-on sequence. Even if the power supply source itself were to activate quickly, the potential on the power supply pin could be delayed by the effect of filters existing in the power supply line to the power supply pin of the IC.

(2007/09)

How can latch-up be effectively prevented?

Think of it as being the same as an ordinary CMOS logic IC.
The following are examples of ways to prevent latch-up.

• Insert, in series, a resistor to control line to a pin such as S or D of the IC
• Insert a resistor (100 to several hundred Ω) between the power supply source and power supply pins
• Externally connect a protection diode (between the power supply and the pins such as S and D).
• Combine the above

(2007/09)

What is the resistance value between input and output when the switch is OFF?

The resistance value is not specified when the switch is OFF.
In this case, a leakage current flows. Refer to the section for source (drain) off-leakage current in the electrical characteristics.

(2007/09)

What is the difference between the uPD4066B (discontinued) in the CMOS4000 series and the uPD5200/5201?

Although both the uPD4066B (discontinued) of the CMOS4000 series and the uPD5200/5201 are CMOS analog switches, they differ widely, as follows.

Item	uPD4066	uPD5200/5201
Power supply voltage (recommended supply voltage range)	+3 V to +18 V	±8 V to 16 V
Power system	Dual (plus and minus) power supply or single power supply	Dual (plus and minus) power supply only
Operating temperature range	-40°C to +85°C	-20°C to +70°C

(2007/09)