| A1 |
Regarding the error type, please check CAN error status registers 0 and 1 of the uPD72005
when an error occurs (when an error interrupt occurs).
Regarding [1]
(1) An SOF is recognized when the 1 ms interval of the dominant state begins and reception is performed.
(2) When the dominant state has lasted for 6 continuous bits, a stuff error is detected.
(3) At the 7th bit, an active error frame is output. (REC = +1)
Moreover, regardless of the fact that an error frame is output, 14-bit dominant is detected. (REC = +8)
(4) Then, every time 8-bit dominant is detected, REC is incremented by 8.
* The above occurs at over an interval of approx. 80 us.
* REC: Receive error counter
Regarding [2]
Since, as described above, REC is incremented by 8 every 8 bits thereafter, so the value of the REC counter exceeds 128 as below.
920 us / 4 us (250 Kbps) = 230 bits
230 bits / 8 bits ~= 28 times
28 times * 8 bits > 128
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