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Volume 69 (July 26, 2007)
Summary of NEC Electronics Papers Presented at the 2007 Symposia on VLSI Technology and Circuits (5/5)
Development of Fundamental New Technologies Enabling Further Digitization of Wireless IP Cores
We have developed key technologies promoting digitization of wireless intellectual property (IP) cores that facilitate easy embedding of IP cores in system LSI chip while reducing the cost and power consumption of wireless devices.
Continuous downscaling of CMOS fab processes has led to a reduction in thermal noise generated in transistors and faster device operation, thus promoting increasing implementation of wireless circuits by digital CMOS devices. Our recent work further advances wireless circuit digitization through the introduction of discrete-time signal processing (*1) that enables a smaller supply voltage. Up to now, digital wireless technology has been limited by the need to incorporate on-chip filters to perform FIR/IIR, FFT, and other filtering and spectrum processing. However, NEC and NEC Electronics have now succeeded in developing two key technologies that enable embedding of IP cores into system LSI chip for transmitters and receivers.
The first technology generates radio frequency (RF) signals from digital signals with significantly lower distortion for use in transmitters. Applying this technology to transmitter modulators and power amplifiers in a wireless IP core eliminates the need for expensive external components to reduce output signal distortion (Figure 1), which helps lower total system costs for wireless transmitter systems. We also implemented a timing adjustment circuit in the power amplifier that further reduces RF signal distortion by optimizing the phase of the digital signal. This significantly shortens the LSI design period, because it enables fine tuning of the device even after chip fabrication.
The second key technology compares sampled RF signals received in a wireless IP core to directly demodulate the RF signal in the received data (Figure 2), and varies the sampling frequency to match the RF signal reception environment (Figure 3). Conventionally, a wireless receiver circuit operates continuously while receiving a single bit of data. However, with our new technology, only part of the circuit needs to be operated when receiving a bit of data to match the communication environment. This permits the operation period of receiver circuits to be shortened in favorable communication environments, and power consumption to be reduced to match the communication environment. Test chips reveal that power consumption is reduced by an order of magnitude compared to conventional communication chips.
Leveraging these new technologies to implement wireless IP cores based on finer geometry fab processes for embedding in system LSI chip, NEC Electronics is speeding up the pace of technological development and contributing to the emergence of the ubiquitous networked society by reducing system costs by using fewer components and by reducing the power consumption of devices for next-generation wireless technology solutions.
Note(*)
- Discrete-time signal processing
Signal processing is significantly reduced by eliminating portions of the frequency band that are not being used and sampling just the data values that are being used. This discrete-time signal processing achieves the same quality results as conventional circuits that use continuous filtering and other time-consuming processes.
