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Volume 69 (July 26, 2007)
Summary of NEC Electronics Papers Presented at the 2007 Symposia on VLSI Technology and Circuits (2/5)
SRAM Critical Yield Evaluation Based on Comprehensive Physical / Statistical Modeling, Considering Anomalous Non-Gaussian Intrinsic Transistor Fluctuations
This is a technology for physically estimating random fluctuations in submicron devices and precisely incorporating the estimated random fluctuations in circuit simulation designs. This enables highly accurate estimates of the stability of circuit characteristics (for example, for an SRAM cell) prior to mass production.
Ever-smaller feature processes have greatly increased the performance and integration of silicon devices, but further downscaling poses tremendous challenges as physical factors result in a dramatic rise in random fluctuations (*1) in elemental device characteristics that cause increasing instability in LSI circuit operations. NEC and NEC Electronics have devoted years of research and development to addressing these issues, and have now developed two new technologies that are already proving effective.
The first technology is a manufacturing process and device operation simulation (*2) tool that takes atomic-level influences and effects into account. This enables us to calculate statistical device characteristic variations of elemental transistors (Figure 1). The second technology gives us the ability to quickly and accurately copy diverse transistor characteristics to a transistor model (*3) for circuit simulation. This enables us to simulate circuit characteristics based on a range of variations that is close to actual fab conditions (Figure 2).
We have demonstrated that the combination of these two tools is more than adequate for estimating yields that take variability into account at the device structure design stage and at the circuit design stage. The ability to design circuits that fully reflect variability of device characteristics is advantageous, for it enables faster fab startup coupled with better reliability, and promises to significantly reduce the time it takes from device design to finished product.
By leveraging smart design technologies that incorporate variability, NEC Electronics supports the growth of the ubiquitous network society by continuing to provide fast-turnaround, excellent-quality, high-performance system LSI chips that meet the needs of our customers. Through its active involvement in the national MIRAI Initiative, NEC Electronics is also very much committed to basic fab process-related R&D activities that effectively reduce and suppress semiconductor device variability factors that inevitably increase as device process dimensions shrink.
Notes(*)
- Intrinsic Transistor Fluctuations
There is always a certain degree of random variation in the characteristics of VLSI circuits, even when transistors are formed on the same chip under the same processing conditions, due to the different locations and numbers of impurity atoms used to dope the silicon crystal. Even if one intends to process electrode materials directly, the materials contain microscopic random fluctuations, so characteristics related to the electrode will also exhibit fluctuations. These random fluctuations adversely affect the operation of circuits, particularly devices such as large-capacity high-speed SRAM chips that depend on all of its characteristics being uniform across the device.These atomic-level fluctuations have suddenly become highly significant as cell dimensions have continued to shrink so dramatically, because (1) so few impurity-doping atoms are now implanted into individual cells that the effects of the individual atoms become relatively greater, and (2) even slight differences in position of the doping atoms can no longer be ignored as a parameter affecting how a device will perform.
- Atomic-level Process and Device Simulation
For the ion implantation and thermal processing used in the manufacture of transistors, we have developed the ability to determine the positions and numbers of impurity atoms in silicon crystal at the atomic level. And by calculating electron mobility based on potential distribution, which is dependent on the positions of the individual impurity atoms, we can accurately calculate device characteristics that reflect the positions and numbers of impurity atoms.
- Transistor Modeling for Circuit Simulation
Circuit simulations are achieved by modeling current flow in the transistors making up the circuit as a voltage function, and then by solving voltage and current simultaneous equations in real time. This essentially solves the age-old problem of how to accurately incorporate fluctuations into transistor models under actual fab conditions.
