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Volume 58 (Aug 23, 2006)
Overview of Papers Presented at IITC 2006 (1/3)
The ninth annual IEEE International Interconnect Technology Conference (IITC), a premier conference for presenting and discussing the latest interconnect and packaging technologies, was held in San Francisco June 5 to 7, 2006. A number of collaborative NEC Electronics/NEC papers were selected for inclusion at this year's conference.
The IITC
The IITC is sponsored by the IEEE Electron Devices Society, an organization interested in integrated circuit device interconnect processes and integration, interconnect design, packaging-related technologies, antenna and other coupling RF systems, and other relevant technologies. Since its inception in 1998, the IITC has been held every June in San Francisco. The conference brings together 600 to 700 professionals in semiconductor manufacturing, IC package fabrication and semiconductor materials development, and is accompanied by supplier seminars and exhibit booths. Approximately 120 papers were submitted to this year's IITC, of which about half were selected, including about 30% for oral presentations and poster displays. Many papers dealing with 45 to 32 nm interconnect technologies, low-k and other discrete process technologies, and cutting-edge technologies such as RF-related technologies were chosen for this year's conference. Companies in Japan emerged from a temporary slump and had more papers selected than from any other country. A number of papers were submitted by academic and research institutes in the U.S. and Europe, with Asia (excluding Japan) coming in second. It is apparent that a good deal of effort is being focused on basic R&D in the U.S. and Europe. The NEC Group was well represented at the IITC with five papers selected.
NEC Electronics Papers Presented at IITC
This is a brief summary of two papers by NEC Electronics/NEC authors that were accepted by the IITC:
- Session 7.7:
- Highly Reliable Interface Control Technology by using Self-Aligned CuSiN Process with Low-k SiC Barrier Dielectric (k=3.5) for 65 nm Node and Beyond
- A highly reliable interface control technology has been developed based on a combination of self-aligned CuSiN processing and low-k barrier dielectric (k=3.5). The technology reduces interconnect capacitance while improving device reliability.
- Session 7.16:
- A Novel CoWP Cap Integration for Porous Low-k/Cu Interconnects with NH3 Plasma Treatment and Low-k Top (LKT) Dielectric Structure
- Increased leakage current between interconnects has been a persistent problem for CoWP metal cap copper interconnects. Leakage current is effectively suppressed with a combination of post-cap NH3 plasma treatment and a low-k top (LKT) dielectric interlayer structure.
- This will enable fabrication of highly reliable copper interconnects for 45 nm node devices and beyond.
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