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Volume 54 (Mar 29, 2006)
Introduction to papers presented at ISSC 2006 (2/3)
A 1-ps-Resolution Jitter-Measurement Macro Using Interpolated Jitter Oversampling
This technique facilitates measurements against the performance degradation accompanying the scaling down of LSI devices and, thus, helps to achieve ongoing improvement of LSI performance. In particular, the technique enables high-precision analysis of operating margins of LSI devices under actual operation as well as prompt discovery of potential problems in the next LSI generation.
In recent years, as the scaling down of LSI chips has continued, the physical phenomena determining the behavior of LSI devices have become ever more complicated. Consequently, with current design methods, design margins have had to be widened and successive improvement of LSI performance has thus become more difficult. The main cause of this problem is that the degradation of signal quality actually inside an LSI in operation cannot be properly understood.
Addressing this problem, NEC Electronics is one of the first to focus on measurement-circuit technology that can get at grip on the degradation of signal quality inside an LSI device. With this technology, a circuit for measuring this signal quality degradation is embedded in the LSI chip. Applying this technology, we are developing new LSI design schemes that can amass these measurements under an actual device environment (see Figure 1).
LSI design margin largely depends on time fluctuation (i.e., "jitter") of the clock signal (which determines operating timing). Accordingly, in this work, we have developed a technique for measuring this clock-signal jitter at high accuracy of one picosecond (1 ps), namely, one trillionth of a second.
Regarding conventional measurement of clock-signal jitter, as shown in Figure 2, there is a tradeoff relationship between measurement frequency and resolution. In other words, to increase the resolution of measurement, the same phenomenon had to be observed many times, and measures such as signal processing were needed. On the contrary, with the developed technique, the measurement-frequency/resolution tradeoff is eliminated, thereby enabling high-resolution measurement—that is, 1-ps resolution—during one clock cycle.
Figure 3 shows the measurement results obtained with an oscilloscope and the results obtained with an "on-chip jitter observation macro" using the developed technique. It is clear from these results that with the new technique, it becomes possible to analyze the upper margin of LSI operation at higher accuracy under an actual operation environment. At the same time, while identifying phenomena with minor influence on device behavior that are difficult to identify at conventional measurement accuracy, the new technique also makes it possible to promptly identify potential problems that might have such an influence in the future.
At NEC Electronics, we will continue working on improving this on-chip measurement technology in such a way that will help us efficiently develop the next generation of high-performance LSI devices.
