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Volume 54 (Mar 29, 2006)

Introduction to papers presented at ISSC 2006 (1/3)


ISSCC 2006 (IEEE International Solid State Circuits Conference)—featuring papers on cutting-edge integrated-circuit technologies—was held February 5-9 in San Francisco, California, and featured several papers introducing the findings of collaborative research conducted recently by NEC Corporation and NEC Electronics.


What is ISSCC?

ISSCC—known as the "Olympics of semiconductors"—is the largest electronics-related conference in the world. This international conference focuses on integrated circuits, while its great counterpart, the IEDM (International Electron Devices Meeting), focuses on semiconductor devices and fabrication processes. Having started in 1954, ISSCC marked its 53rd meeting in 2006 with the theme of "Multimedia for the Mobile World."
From just under 700 papers submitted (more than the record number submitted last year), 255 were chosen. Specialized topics continued the trend started last year and featured a majority of papers on wireless communication. As for the regional origins of the authors, the U.S. showed a considerable increase from last year, while those from Europe and Asia stayed about the same.
Of the papers submitted by Asia-based authors, those from Taiwan were particularly well received. Compared to last year and years past, the number of papers submitted from authors in Taiwan increased three times. Moreover, this year saw Taiwan surpass after Korea and become the third biggest submitter of papers, after the U.S. and Japan. Nine paper from NEC Group were accepted.
ISSCC 2006 was split into two sessions: "paper sessions" for presenting pre-published papers and "discussion sessions" for discussing technology trends on specific themes. At these sessions, cutting-edge applications and IC designs based on semiconductor technologies were vigorously discussed.



Presented Papers related to NEC Electronics

Two of these papers accepted by ISSCC are summarized below.

<Brief summary of presented papers>


  • Session 28: Wireline Building Blocks
    • A 1-ps-Resolution Jitter-Measurement Macro Using Interpolated Jitter Oversampling
    • This technique facilitates measurements against the performance degradation accompanying the scaling down of LSI devices and, thus, helps to achieve ongoing improvement of LSI performance. In particular, the technique enables high-precision analysis of operating margins of LSI devices under actual operation as well as prompt discovery of potential problems in the next LSI generation.




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