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Volume 45 (Aug 05, 2005)
Overview of Papers Presented at 2005 Symposia on VLSI Technology and Circuits (4/4)
Monitoring Technique for Optimized VDD/VTH Control (Session 20-2)
As semiconductor structures become more and more fine, it becomes more difficult to achieve the required performance with simple scaling, due either to increased leakage current or to speed degradation caused by measures to prevent it. Because of this difficulty, NEC is developing technology that combines dynamic voltage and frequency scaling (DVFS) technology to control operating voltage (VDD) and frequency, and threshold voltage (VTH) control according to the performance requirements of the system LSI.
In collaboration with NEC, we have developed a monitoring method that demonstrates optimal low-power effect by dynamically controlling the VDD and VTH for system LSI chips (Figure 7). The following three technologies were developed.
1.) Stabilization of VDD/VTH through exclusive control
This VDD/VTH control technology suppresses oscillation and unstable operation that can result between the two controllers when both VDD and VTH are controlled at the same time. VDD and VTH are exclusively controlled according to the state of the delay monitor, guaranteeing speed performance (Figure 8).
2.) Minimization of active power consumpsion through fixed-ratio control of switching current (ISW)/leakage current (ILEAK)
This technology controls VDD/VTH to minimize active power consumpsion (PACTIVE) for system LSI chips by taking into consideration that fact that the ISW / ILEAK ratio is almost stable for operating environment factors such as operating frequency or temperature.
3.) Minimization of standby power consumpsion through balance control between sub-threshold current (IOFF) and substrate current (ISUB)
This VTH control technology minimizes standby power consumpsion by controlling the increased ISUB, mainly gate-induced drain leakage (GIDL) and reduced IOFF due to applying body bias. This technology is done by monitoring circuit to optimize body-bias with maintaining monitoring precision even when VDD is suppressed for low standby power consumption.
With the 90 nm prototype chip, the monitoring circuit was able to control and optimize VDD/VTH to achieve minimal power consumption, even when the operating frequency was changed. Also, with the standby monitor, the circuit exhibited the same characteristics as with an ideal substrate bias, even when the source voltage was reduced, achieving accuracy within 20% of the minimum ILEAK (Figure 9).
We have introduced the LongRun2, low-power technology from Transmeta Corp., which integrates VTH control by substrate bias control and DVFS-based VDD control. By combining this technology with our monitoring technology, we are making progress toward achieving a stable implementation of automatic VDD/VTH control.
• LongRun2 is a trademark of Transmeta Corporation
Volume 46
