EMMA2HL (µPD61160)
Digital Hi-Vision System LSI
Overview
The EMMA2HL (µPD61160) decoder is targeted to affordable TVs and STBs and incorporates all of the necessary functions for processing of digital broadcasts in emerging TV / STB applications.
Target System
- Digital TVs supporting BS/CS/terrestrial digital broadcasting in Japan (ARIB) and North America (ATSC)
- STBs
Product Specification
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Product Specification
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On-chip
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- Dual CPU architecture of NEC Electronics VR5500 core and MIPS32® core
- Main CPU : NEC Electronics MIPS VR5500 core
- for application software/RTOS/API/BIOS
- 533 MIPS(Dhrystone)@266 MHz
- MIPS IV instruction set based
- I-Cache: 32 KBytes, D-Cache: 32 KBytes
2-way nonblocking with line locking
- N-Wire (JTAG exclusive) debugger support
- Sub CPU : MIPS32® Core
- for µPD61160 internal firmware
- 240 MIPS(Dhrystone)@200 MHz
- I-cache: 8 KBytes, D-cache: 8 KBytes
2-way nonblocking with line locking
- External ICE mode supports
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Memory Interface
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- Unified Memory interface
- Main use: MPEG decode, graphics, display (main CPU work area)
- Kind of memory: Direct RDRAM®
- Max frequency: 400 MHz to 533 MHz
- Data bus width: (16 bits)
- Band width (peak):
2.1 GByte/s@533 MHz
1.6 GByte/s@400 MHz
- Work Memory interface
- Main Use: VR5500 (main CPU) work area
- Kind of memory: SDR-SDRAM
- Max frequency: 100 MHz to 133 MHz
- Data bus width: 32 bits/16 bits/0 bit (unused)
- Band width (peak): 533 MByte/s@133 MHz
- ROM interface
- Main use: VR5500 (main CPU) Object code
- Kind of memory: Normal ROM / Flash
- Max frequency: CPU clock/4n (n = 1, 2,...)
- Data bus width: 16 bits/8 bits
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TS-Demux & TS Interface
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- Software architecture by NEC Electronics original processor core
- Correspond to various TS formats by firmware change
- RAM include for firmware
- TS stream interface 3-inputs and 3-input/outputs
- Tuner interface 3ch serial inputs
NEC Electronics µPD61521 interface support (4-line serial)
- IEEE1394 interface 1ch parallel input/output, 2ch serial input/outputs
- Descrambler support
- Dual Multi2 (Japanese method) descrambler
- 3ch TS stream simultaneously demux processing
- PID / Section filters include
- General/Video/Audio/Section PID filters
- PID filters for IEEE1394 interface (partial TS interface)
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Video Decoder
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- Multi stream video decoder
- MPEG2 MP@HL x 2ch decoding simultaneously
- MPEG2 MP@HL x 1ch + MP@ML x 3ch decoding simultaneously
- MPEG2 MP@ML x 4ch decoding simultaneously
- IDCT acceleration function support for JPEG decode
- MPEG I-flame decode support
- Video special play mode, I-flame search support
- Automatically AV synchronizing
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Audio Decoder
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- NEC Electronics original DSP core include (1 stream decode)
- MPEG2-AAC LC / Dolby® Digital/ MPEG2-BC (2ch)
- Effect sound (PCM) Mix
- RAM include for firmware
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Video Display Process
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- Main video
- Plane before mix
- MPEG (move/still): 4 planes Max.
(HDx2ch or HDx1ch+SDx2ch or SDx4ch)
- OSD: 3 planes
- HWC: 1 plane
- Back plane: 1 plane
- Display plane number: max 8-Planes + Background Plane
- Sub video (Down convert output)
- Plane before mix
- MPEG (move/still): 1 plane (HDx1ch or SDx1ch)
- OSD: 1 plane
- Back plane: 1 plane
- Display plane number: max 2-Planes + Background Plane
- Optical scaling range: x1/16 to x Optional magnification
- Clorimetry convert: REC601 <=> REC709 bi-directional convert
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Video Interface
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- Video outputs
- Main video
- Analogue: HD (1080i/720p/480p/480i) output with 10-bit DACs
- Digital: ITU-R BT.709 YPbPr (16-bit) or GBR (24-bit)
- Sub video
- Analogue: NTSC/PAL (with Copy Guard) output with 10-bit DACs
- Digital: ITU-R BT.656 (8-bit)
- External video capturing
- 480i/480p 16-bit digital video input
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Audio Interface
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- Audio outputs: I2S PCM output support
- 5.1ch
- Down mix 2ch (with effect sound)
- Down mix 2ch
- External audio capturing (PCM digital audio input)
- Stream output for external audio decoder
- SPDIF/I2S output format for another channel decode
- Clock signal output for external audio surround LSI
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Peripheral Interface
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- PCI™ bus interface
- Other interface
- Smart Card interface x 2
- UART interface x 3
- I2C™ interface x 3
- Clocked serial interface (CSI) x 2
- GPIO
- ISA liked general IO interface
- JTAG
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Block Diagram
Product Lineup
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Order Number
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Package
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Package Code
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T.B.D
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641-pin plastic BGA (35 x 35 mm, 1.00 mm ball pitch)
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T.B.D
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This device is protected by U.S. patent numbers 5,583,936; 6,516,132; 6,836,549; and 7,050,698, and other intellectual property rights. The use of Macrovision's copy protection technology in the device must be authorized by Macrovision and is intended for home and other limited pay-per-view uses only, unless otherwise authorized in writing by Macrovision. Reverse engineering or disassembly is prohibited.
This Device can only be sold or distributed to Authorized Buyers.
This device is protected by U.S. patent numbers 6,600,873 and other intellectual property rights.
