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Products > Digital AV LSI > MPEG Decoder for STB >

EMMA2SL/S (µPD61216)

Low-cost LSI for digital set-top boxes with an integrated QPSK demodulation circuit


Overview

The EMMA2SL/S (µPD61216) family provides powerful, single chip solutions for DVB-T and DVB-S FTA STB by integrating all the elements required in an MPEG decoder.
This is a high cost-performance product which incorporates a QPSK digital demodulator, a VCXO circuit, and other devices that are required for receiving digital satellite broadcasting in one single chip. At the same time the product reduces customer system costs and delivers an outstanding performance thanks to its high-end processor.


Target System

  • Low-end STB and iDTV

Product specification

Product specifications
Internal CPU
  • Main CPU: Application/RTOS/API/BIOS processing purposes
    • MIPS32® 4KEc® core
    • 284 MIPS @ 186 MHz
    • Supports MIPS II™ and MIPS-16 instruction sets
    • Cache size: I-Cache: 4 KB, D-Cache: 4 KB
    • Scratch Pad: 8 KB
Memory interface
  • RAM Memory I/F
    • Unified RAM Memory I/F: CPU/MPEG decoding/display/graphics, etc.
    • SDRAM I/F: Supports 8 to 16 MB capacity
  • ROM Memory I/F
    • Supports NOR Flash ROM
    • Supported maximum capacity: 32 MB
Front Emd
  • QPSK demodulator
  • Symbol rate: 1 to 45 M Symbol/s
  • Automatic scan function
MPEG stream processor
  • NEC Electronics original processor core
  • Software processing architecture
  • Stream I/F: Parallel/serial input x 1
  • MPEG2 TS (Transport Stream)
  • Maximum TS processing rate: 100 Mbps
  • 36 PID filters (including Video x 1, Audio x 2, PCR x 1)
  • 32 section filters (8-byte/16-byte depth)
  • Supports HSD (High Speed Data) port output
MPEG video decoder
  • Supports MPEG2 MP@ML 1 system decoding
Audio controller
  • Supports MPEG1/MPEG2 layer 1/2
  • Supports DAO (Digital Audio Output) L/R output
  • Supports SPDIF output
Display
  • 3 planes: BG (Back Ground), Live Video, and OSD
  • 256 gray-scale a-blending function
  • Real-time video scaling (1/4 to 4/1H/V)
  • OSD anti-flicker filter
Video encode
  • NTSC/PAL video encoder
  • Supports Closed Caption, WSS, Video ID, VPS, and Teletext
  • 4-channel DAC for simultaneous RGB/YC&CVBS analog output
Peripherals
  • FUART x 1
  • UART x 1
  • I2C x 2
  • Timer: System
  • IR receiver
  • General PIO
Process
  • 0.15 µm CMOS process
  • Power supply: 3.3 V, 1.5 V



Block Diagram

Block Diagram

Product Lineup

T.B.D



This device is protected by U.S. patent numbers 5,583,936; 6,516,132; 6,836,549; and 7,050,698, and other intellectual property rights. The use of Macrovision's copy protection technology in the device must be authorized by Macrovision and is intended for home and other limited pay-per-view uses only, unless otherwise authorized in writing by Macrovision. Reverse engineering or disassembly is prohibited.
This Device can only be sold or distributed to Authorized Buyers.



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