Analog Core

ADC Core

DAC Core

PLL/VCO/SSCG Core

Laser Control Core (PWM)

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ADC Core

ADC cores convert analog signals into digital signals.
They are divided into various types, according to parameters such as conversion speed, number of bits, number of channels and input signal amplitude.

Bit MHz(max.) Channel CB-12 CB-130 CB-90 CB-55 CB-40 6 70 1 ↓ (6 bit 95 M) ↓ (6 bit 100 M) ↓ (6 bit 100 M)     95 1/2 O (M: 3.3 V) ↓ (6 bit 100 M) ↓ (6 bit 100 M)     100 1   O (M: 3.3 V) O (M,L: 3.3 V)     140 3 O (M: 3.3 V)         8 8 1 O (M: 3.3 V)         30 1 O (M: 3.3 V) O (M: 3.3 V)       10 0.1 1/8 ↓(10 bit 500 k or 1 M) ↓(10 bit 500 k) ↓(10 bit 500 k or 1 M)     0.5 12 O (L: 3.3 V) O (M: 3.3 V) O (M,L: 3.3 V)     1 8 O (L: 3.3 V)   P (M: 3.3 V)     20 1 O (M: 3.3 V)         40 1 O (M: 3.3 V)   O (M: 3.3 V)     O : Officially released,   P : Provisionally released,   ↓ : Another type core available, * : Contact NEC Electronics regarding support.

Supports Cell-Based IC Products Series

• CB-12
• CB-130
• CB-90

DAC Core

DAC cores convert digital signals into analog signals.
They are divided into various types, according to parameters such as conversion speed, number of bits, number of channels and analog output signal amplitude.

Bit MHz(max.) Channel CB-12 CB-130 CB-90 CB-55 CB-40 8 5 2     O (M,L: 3.3 V)     30 1/2/3 ↓ (8 bit 35 M)         35 1/2/3 O (M: 3.3 V)         10 30 1/2/3 ↓ (10 bit 35 M) O 1ch (M: 3.3 V) O 1ch (M,L: 3.3 V) O 1ch (L: 3.3 V) O 1ch (L: 3.3 V) 35 1/2/3 O (M: 3.3 V)         80 1/2/3 O (M: 3.3 V)         135 1 ↓ (10 bit 150 M)         150 1 O (M: 3.3 V)         12 170 2/3         O (M: 3.3 V) O : Officially released,   P : Provisionally released,   ↓ : Another type core available, * : Contact NEC Electronics regarding support.

Supports Cell-Based IC Products Series

• CB-12
• CB-130
• CB-90
• CB-55
• CB-40

PLL/VCO/SSCG Core

A phase locked loop, or PLL, is a type of oscillator used, for example, in the generation of ASIC system clocks. PLLs are broadly divided into whether a definition of the phase relationship between PLL input and output is required or not required. Development of spread-spectrum clock generators (SSCGs) for reducing electromagnetic interference (EMI) levels is also progressing.

Topic

Type MHz (min.) MHz (max.) CB-12 CB-130 CB-90 CB-55 CB-40 Skew Control 160 320   O (M: 1.2 V)       200 400 O (M: 1.5 V)   O (M: 1.0 V)     300 540   O (M: 1.2 V)       650 1340     O (M: 1.0 V)     800 1600       O (L: 1.2 V)   1000 2000     O (M: 1.0 V)     Multiplying 25 50 O (M: 0.9-1.65 V)         35 70 O (M: 1.5 V)         45 100 O (M: 0.9-1.65 V)         70 120 O (M: 1.5 V)         75 150   O (M: 3.3 V)       90 180   O (M: 1.2 V)       100 200 O (M: 1.5 V)         60 250 O (M: 1.5 V)   O (M: 1.0 V)     160 320   O (M: 1.2 V)       170 340     O (L: 1.2 V)     200 400     O (M: 1.0 V) O (L: 1.2 V)   250 400 O (M: 1.5 V)         300 600   O (M: 1.2 V)       400 800     O (M: 1.0 V)     SSCG 48 100 O (M: 1.5 V)         100 200 O (M: 1.5 V)         160 320   O (M: 1.2 V)       200 400     O (M: 1.0 V)     400 800     O (M: 1.0 V)     Multi-Phase Output 400 800 O (M: 1.5 V)         600 1200     O (M: 1.0 V)     O : Officially released,   P : Provisionally released,   ↓ : Another type core available, * : Contact NEC Electronics regarding support.

Supports Cell-Based IC Products Series

• CB-12
• CB-130
• CB-90
• CB-55

Laser Control Core (PWM)

In our pursuit of specialized functions and usability of pulse width modulation (PWM) cores in office printers and copiers that use lasers, we have developed a highly precise on-chip core that has both noise suppression properties and low power consumption.

Topic

CB-12 CB-130 CB-90 PWM R     R : Released

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