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CB-55L (Features/Basic Specifications)


Features

These are cutting-edge cell-based ICs based on 55 nm CMOS process technology.
It incorporates transistors using High-k insulation layers, for realization of low leakage current and high-speed operation.
Compared with the conventional CB-90, it reduces leakage current from between 25% to 50% and cuts power consumption by approximately 60% in 1.0 V operation, and increases operation speed by approximately 20% in 1.2 V operation, while achieving roughly one half of the chip size of an equally-functional LSI.
Providing an IP core equipped with a PLL, A/D converter, D/A converter and other commodities, and with an IP core providing USB 2.0, JPEG, DDR/DDR2 and SDRAM nterfaces ideally suited for digital cameras, digital video cameras and other such mobile terminals, the CB-55L is perfect for system development of low-power-consumption mobile terminals.


Basic Specification

Series Name CB-55L (1.0V) CB-55L (1.2V)
Product name µPD811xxx
Technology 55 nm CMOS process
Power supply voltage Internal 1.0±0.1 V 1.2±0.1 V
I/O block 3.3±0.3 V or 2.5±0.2 V or 1.8±0.15 V
Mountable gates (minimum step)*1 5 M gates
Mountable gates (maximum step)*1 100 M gates
Maximum system frequency 233 MHz 450 MHz
Power consumption*2 1.0 nW/MHz/gates 1.4 nW/MHz/gates
Memory (capacity) 1-port SRAM 2 to 128 bits, 16 words to 16 K words
2-port (1R+1W) SRAM 2 to 128 bits, 32 words to 4 K words
2-port (1RW+1RW) SRAM 2 to 128 bits, 16 words to 8 K words
ROM 2 to 128 bits, 128 words to 8 K words
Package FPBGA, PBGA, FCBGA


Note(*)

  1. The mountable gates are the maximum number of usable gates (average value) when mounting only logic gates on the chip. This number can vary greatly depending on the circuit configuration and the types and number of mounted cores.
  2. Operation rate: 0.35