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Japan
Mixed Signal ASIC
NEC Electronics offers Mixed signal ASIC which adopts BiCMOS process from 0.65 µm to 0.35 µm rule.
Furthermore, in 0.35 µm BiCMOS, the analog core of cell base IC, CB9VX, can be built in.
Mixed signal ASIC Lineup
| Product Categories | Mixed Signal ASIC | |
| Product Series | MA-8A |
MA-9 |
| Name of Maser | ( µPD688XX) | ( µPD681XX) |
| Process | 0.65 m BiCMOS process | 0.35 m BiCMOS process
(Equivalent to CB-9VX) |
| Power-Supply Voltage | 5 V power supply
(For 3.3 V Library) |
3.3 V power supply
(For large-scale systems) |
| Circuit Diagram |  |
 |
Feature
Digital/Analog Coexistence Circuit Corresponding
- By adoption of the latest BiCMOS process, 1 chip Integration of 0.65 µm CMOS gate array and Analog ASIC (Analog master) can be realized.
Analog Element Composition with Priority to the Circuit Function
- The analog circuit composition intermingled in the bipolar transistor and CMOS transistor of a BiCMOS process is possible.
- High input impedance OP-amp
- Sample and Hold circuit
- Analog switch etc.
An Analog IP Core is Supported
- Analog cores such as A/D and D/A converters for 0.35 µm cell base IC can be used.
Adoption of the Latest BiCMOS Process
- By adoption of the 0.35 µm BiCMOS process, 1chip integration of high-speed digital circuit and a high accuracy and high performance analog circuit can be realized.
Small Package Correspondence
Various kinds CSP (Chip Size Package) those can respond to downsizing of a set in additio to the conventional mould package are prepared.
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