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Products > ASIC > Analog ASIC > Product Lineup > Mixed Signal ASIC >

MA-9 Series (Feature/Basic specification)


Feature

High-speed digital circuit and high-performance analog circuit can be integrated into one chip by adopting cutting-edged 0.35µmBiCMOS process. Energy-saving can also be realized with the implementation of low-voltage operation process (3.3 V)


Basic specification

1. Logic part


Name of master µPD681xx
Process 0.35µm BiCMOS Process
Power-supply voltage 3.3V±0.3V (Part I/O∙Internal gate)
The maximum integration (Only logic) 1.7MGate (Usable)
Interface Level LVTTL
Delay Time Internal gate *1 114ps (TYP)
Input buffer *2 169ps (TYP)
Output buffer *3 864ps (TYP)


Note(*)

  1. The value is applicable to the conditions where 2 input NAND power gate, fan-out, and wiring length of 0.6mm/1 pin pair are present.
  2. The value is applicable to the conditions where fan-out 2 and wiring length 0.6mm/1 pin pair are present.
  3. The value is applicable to load capacity of 15pF and block name FOO1.

2. Analog part


Name of master µPD681xx
Process 0.35µm BiCMOS Process
Power-supply voltage 3.3V±0.3V
Transistor NPN type fT= 10GHz, hFE= 70 (All TYP)
PNP type (Bartical type) fT= 2GHz, hFE= 30 (All TYP)
MOS For analog circuits N-ch type, P-ch type
Polysilicon resistance *1 Absolute accuracy: ±20%, Relative accuracy: ±2%
Capacitor (MIM type) *1 Absolute accuracy: ±20%, Relative accuracy: ±2%


Note(*)

  1. For reference only. Relative accuracy is limited when the element is adjacently arranged.