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MA-8A Series
Basic specification
1. Logic part
|
Name of master
|
µPD680xx
|
|
Process
|
0.65µm BiCMOS Process
|
|
Power-supply voltage
|
5.0V±0.5V (Part I/O∙Internal gate)
|
|
Interface level
|
CMOS,TTL
|
|
Delay time
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Internal gate*1
|
190ps (TYP)
|
|
Input buffer*2
|
340ps (TYP)
|
|
Output buffer*3
|
2.13ns (TYP)
|
|
Note(*)
- The value is applicable to the conditions where 2 input NAND power gate, fan-out, and wiring length of 0.6mm/1 pin pair are present.
- The value is applicable to the conditions where fan-out 2 and wiring length 0.6mm/1 pin pair are present.
- The value is applicable to load capacity of 15pF and block name FOO1.
2. Analog part
|
Name of master
|
µPD680xx
|
|
Process
|
0.65µm BiCMOS Process
|
|
Power-supply voltage
|
5.0V±0.5V
|
|
Transistor
|
NPN type
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fT= 10GHz, hFE= 80 (All TYP)
|
|
PNP type (Lateral type)
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fT= 10MHz, hFE= 70 (All TYP)
|
|
MOS
|
For analog circuits N-ch type, P-ch type
|
|
Polysilicon resistance *1
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Absolute accuracy: ±20%, Relative accuracy: ±2% (All MAX)
|
|
Capacitor (MOS type) *1
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Absolute accuracy: ±15%, Relative accuracy: ±2% (All MAX)
|
|
Note(*)
- For reference only. Relative accuracy is limited when the element is adjacently arranged.